Abstract:
A differential line driver circuit comprising a plurality of driver stages is described. Each driver stage is operably coupled to at least one output of the line driver circuit and arranged to receive at least one control signal and to drive at least one output signal on the at least one output of the line driver circuit in accordance with the at least one control signal received thereby. The line driver circuit further comprises at least one delay component arranged to receive the at least one control signal, and to sequentially propagate the at least one control signal to the driver stages with time delays between the propagation of the at least one control signal to sequentially adjacent driver stages. The delay component is arranged to sequentially propagate the at least one control signal to the driver stages such that such that the at least one control signal is propagated with at least one of: a progressively increasing time delay between sequentially adjacent driver stages; and a progressively decreasing time delay between sequentially adjacent driver stages.
Abstract:
An electrostatic discharge (ESD) protection circuit for protecting one or more devices in an electronic circuit from an ESD current which enters the electronic circuit through one or more input/output pins, the protection circuit comprising: a voltage clamp circuit connectable to the or each pin, for diverting the ESD current from the or each device; and a current sensor circuit connected between the input/output pins and the voltage clamp circuit and connected to the one or more devices, the current sensor circuit for sensing the ESD current and for switching off the or each device when the sensed current exceeds a threshold value, wherein when a current flows in the current mirror circuits above a threshold value the device is caused to switch off.
Abstract:
An electrostatic discharge (ESD) protection circuit for protecting one or more devices in an electronic circuit from an ESD current which enters the electronic circuit through one or more input/output pins, the protection circuit comprising: a voltage clamp circuit connectable to the or each pin, for diverting the ESD current from the or each device; and a current sensor circuit connected between the input/output pins and the voltage clamp circuit and connected to the one or more devices, the current sensor circuit for sensing the ESD current and for switching off the or each device when the sensed current exceeds a threshold value, wherein when a current flows in the current mirror circuits above a threshold value the device is caused to switch off.
Abstract:
The invention includes a power amplifier with an amplifier core including parallel amplifier cells, a replica cell made of one amplifier cell similar to those of the amplifier core, a power controller to select a combination of amplifier cells to activate, a regulator to fix the top voltage of the replica cell to a reference voltage, a voltage generator to provide the voltage reference to the regulator, a current generator to provide a reference current through the replica cell, and a drive unit controlled by the regulator output to drive the combination of amplifier cells, so that each selected combination of activated cells defines a predetermined attenuation level of power amplifier output signal so that it is attenuated in a stepwise manner.
Abstract:
The passive transponder comprises an antenna (2) connected to an integrated circuit (6) the analogue part of which includes a passive voltage rectifier (8) supplying a rectified voltage (VDC1) and an active multiplier or booster (16) for said rectified voltage which is formed by a capacitor (C2) switched to a relatively low frequency, for example 1 MHz, by means of switches formed by transistors (18 to 21) controlled using an oscillator (24).
Abstract:
A buffer apparatus for a communications bus comprises a driver circuit having an output. An amplifier circuit having an input is coupled to the output of the driver circuit. The driver circuit is arranged to generate, when in use, a drive signal having a waveform that comprises a step therein so as to substantially suppress generation by the amplifier circuit of a portion of an oscillation of an output signal.
Abstract:
The UHF transponder includes protection against electrostatic discharge (ESD) formed by the modulation transistor (T1) and additional control means (20) for said transistor which fulfils two functions: its first response signal modulation function and an additional ESD protection function.
Abstract:
A buffer apparatus for a communications bus comprises a driver circuit having an output. An amplifier circuit having an input is coupled to the output of the driver circuit. The driver circuit is arranged to generate, when in use, a drive signal having a waveform that comprises a step therein so as to substantially suppress generation by the amplifier circuit of a portion of an oscillation of an output signal.
Abstract:
Disclosed is a circuit and method for automatic tuning of a resonant circuit in a transceiver having a receiver and a transmitter that includes a power amplifier for driving the resonant circuit. During a transmit mode of the transceiver, a resonance voltage of the resonant circuit is compared to an input voltage signal to the power amplifier to determine an error signal that is converted into a control word. The control word drives an adjustable capacitance bank that is part of the resonant circuit. During a receive mode of the transceiver, the control word value is held constant to substantially maintain resonance of the resonant circuit during operation of the receiver.
Abstract:
Radio receivers for frequency-modulated signals and more particularly, in such receivers, to a device for the demodulation of a signal modulated at intermediate frequency f.sub.i. The signal F.sub.M that is frequency modulated around a frequency f.sub.i is applied, after conversion into a square-wave signal F.sub.MR, to a delay line with shift registers that is controlled by the signals provided by an oscillator. Each of the three cascade-connected sections of the delay line introduces a delay 1/4f.sub.i and the output signals of each section are applied to EXCLUSIVE OR circuits that respectively give a demodulated signal F.sub.R1, a signal F.sub.R2 for the suppression of a demodulated signal and a signal F.sub.R3 to control the frequency of the oscillator.
Abstract translation:用于频率调制信号的无线电接收机,更具体地,在这样的接收机中,涉及用于解调在中间频率fi调制的信号的装置。 在转换成方波信号FMR之后,频率调制频率fi的信号FM被施加到由振荡器提供的信号控制的移位寄存器的延迟线。 延迟线的三个级联连接部分中的每一个引入延迟+ E,fra 1/4 + EE fi,并且每个部分的输出信号被施加到分别给出解调信号FR1的异或或电路,信号FR2用于 抑制解调信号和信号FR3来控制振荡器的频率。