公开(公告)号：US08008140B2

公开(公告)日：2011-08-30

申请号：US11256086

申请日：2005-10-24

申请人： Mayumi Yamaguchi ,  Atsuo Isobe ,  Satoru Saito

发明人： Mayumi Yamaguchi ,  Atsuo Isobe ,  Satoru Saito

IPC分类号： H01L21/00

CPC分类号： H01L27/1266 ,  H01L27/1214 ,  H01L27/127 ,  H01L29/66757 ,  H01L29/78621 ,  H01L2029/7863

摘要： It is an object of the present invention to manufacture a TFT having a small-sized LDD region in a process with a few processing step and to manufacture TFTs each having a structure depending on each circuit separately. According to the present invention, a gate electrode is a multilayer, and a hat-shaped gate electrode is formed by having the longer gate length of a lower-layer gate electrode than that of an upper-layer gate electrode. At this time, only the upper-layer gate electrode is etched by using a resist recess width to form the hat-shaped gate electrode. Accordingly, an LDD region can be formed also in a fine TFT; thus, TFTs having a structure depending on each circuit can be manufactured separately.

摘要翻译： 本发明的目的是在具有少量加工步骤的工艺中制造具有小尺寸LDD区域的TFT，并且制造各自具有依赖于每个电路的结构的TFT。 根据本发明，栅电极是多层的，并且通过使下层栅电极的栅极长度比上层栅电极的栅极长度长，形成帽形栅电极。 此时，仅通过使用抗蚀剂凹部宽度来蚀刻上层栅电极，形成帽状栅电极。 因此，也可以在精细TFT中形成LDD区域; 因此，可以分别制造具有取决于每个电路的结构的TFT。

公开(公告)号：US20060091398A1

公开(公告)日：2006-05-04

申请号：US11256086

申请日：2005-10-24

申请人： Mayumi Yamaguchi ,  Atsuo Isobe ,  Satoru Saito

发明人： Mayumi Yamaguchi ,  Atsuo Isobe ,  Satoru Saito

IPC分类号： H01L29/76 ,  H01L29/04

CPC分类号： H01L27/1266 ,  H01L27/1214 ,  H01L27/127 ,  H01L29/66757 ,  H01L29/78621 ,  H01L2029/7863

摘要： It is an object of the present invention to manufacture a TFT having a small-sized LDD region in a process with a few processing step and to manufacture TFTs each having a structure depending on each circuit separately. According to the present invention, a gate electrode is a multilayer, and a hat-shaped gate electrode is formed by having the longer gate length of a lower-layer gate electrode than that of an upper-layer gate electrode. At this time, only the upper-layer gate electrode is etched by using a resist recess width to form the hat-shaped gate electrode. Accordingly, an LDD region can be formed also in a fine TFT; thus, TFTs having a structure depending on each circuit can be manufactured separately.

摘要翻译： 本发明的目的是在具有少量加工步骤的工艺中制造具有小尺寸LDD区域的TFT，并且制造各自具有依赖于每个电路的结构的TFT。 根据本发明，栅电极是多层的，并且通过使下层栅电极的栅极长度比上层栅电极的栅极长度长，形成帽形栅电极。 此时，仅通过使用抗蚀剂凹部宽度来蚀刻上层栅电极，形成帽状栅电极。 因此，也可以在精细TFT中形成LDD区域; 因此，可以分别制造具有取决于每个电路的结构的TFT。

公开(公告)号：US07923778B2

公开(公告)日：2011-04-12

申请号：US11876429

申请日：2007-10-22

申请人： Tetsuji Yamaguchi ,  Atsuo Isobe ,  Satoru Saito

发明人： Tetsuji Yamaguchi ,  Atsuo Isobe ,  Satoru Saito

IPC分类号： H02L27/14 ,  H01L27/88

CPC分类号： H01L27/1259 ,  H01L27/1214

摘要： A salicide process is conducted to a thin film integrated circuit without worrying about damages to a glass substrate, and thus, high-speed operation of a circuit can be achieved. A base metal film, an oxide and a base insulating film are formed over a glass substrate. A TFT having a sidewall is formed over the base insulating film, and a metal film is formed to cover the TFT. Annealing is conducted by RTA or the like at such a temperature that does not cause shrinkage of the substrate, and a high-resistant metal silicide layer is formed in source and drain regions. After removing an unreacted metal film, laser irradiation is conducted for the second annealing; therefore a silicide reaction proceeds and the high-resistant metal silicide layer becomes a low-resistant metal silicide layer. In the second annealing, a base metal film absorbs and accumulates heat of the laser irradiation, and a semiconductor layer is supplied with beat of the base metal film in addition to heat of the laser irradiation, thereby enhancing efficiency of the silicide reaction in the source and drain regions.

摘要翻译： 对薄膜集成电路进行自对准处理，而不用担心对玻璃基板的损坏，因此可以实现电路的高速操作。 在玻璃基板上形成贱金属膜，氧化物和基底绝缘膜。 在基底绝缘膜上形成具有侧壁的TFT，并且形成覆盖TFT的金属膜。 在不会引起基板收缩的温度下由RTA等进行退火，在源极和漏极区域形成高阻金属硅化物层。 在除去未反应的金属膜之后，对第二次退火进行激光照射; 因此进行硅化物反应，高阻金属硅化物层变成低电阻金属硅化物层。 在第二退火中，贱金属膜吸收并累积激光照射的热量，并且除了激光照射的热量之外，还向半导体层供给贱金属膜的节拍，从而提高源的硅化物反应的效率 和漏区。

公开(公告)号：US20050253178A1

公开(公告)日：2005-11-17

申请号：US11110918

申请日：2005-04-21

申请人： Tetsuji Yamaguchi ,  Atsuo Isobe ,  Satoru Saito

发明人： Tetsuji Yamaguchi ,  Atsuo Isobe ,  Satoru Saito

IPC分类号： H01L21/00 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12

CPC分类号： H01L27/1259 ,  H01L27/1214

摘要： A salicide process is conducted to a thin film integrated circuit without worrying about damages to a glass substrate, and thus, high-speed operation of a circuit can be achieved. A base metal film, an oxide and a base insulating film are formed over a glass substrate. A TFT having a sidewall is formed over the base insulating film, and a metal film is formed to cover the TFT. Annealing is conducted by RTA or the like at such a temperature that does not cause shrinkage of the substrate, and a high-resistant metal silicide layer is formed in source and drain regions. After removing an unreacted metal film, laser irradiation is conducted for the second annealing; therefore a silicide reaction proceeds and the high-resistant metal silicide layer becomes a low-resistant metal silicide layer. In the second annealing, a base metal film absorbs and accumulates heat of the laser irradiation, and a semiconductor layer is supplied with heat of the base metal film in addition to heat of the laser irradiation, thereby enhancing efficiency of the silicide reaction in the source and drain regions.

摘要翻译： 对薄膜集成电路进行自对准处理，而不用担心对玻璃基板的损坏，因此可以实现电路的高速操作。 在玻璃基板上形成贱金属膜，氧化物和基底绝缘膜。 在基底绝缘膜上形成具有侧壁的TFT，并且形成覆盖TFT的金属膜。 在不会引起基板收缩的温度下由RTA等进行退火，在源极和漏极区域形成高阻金属硅化物层。 在除去未反应的金属膜之后，对第二次退火进行激光照射; 因此进行硅化物反应，高阻金属硅化物层变成低电阻金属硅化物层。 在第二退火中，贱金属膜吸收并累积激光照射的热量，并且除了激光照射的热量之外，还向半导体层供应贱金属膜的热量，从而提高源的硅化物反应的效率 和漏区。

公开(公告)号：US20080179599A1

公开(公告)日：2008-07-31

申请号：US11876429

申请日：2007-10-22

申请人： Tetsuji YAMAGUCHI ,  Atsuo Isobe ,  Satoru Saito

发明人： Tetsuji YAMAGUCHI ,  Atsuo Isobe ,  Satoru Saito

IPC分类号： H01L27/14

CPC分类号： H01L27/1259 ,  H01L27/1214

摘要： A salicide process is conducted to a thin film integrated circuit without worrying about damages to a glass substrate, and thus, high-speed operation of a circuit can be achieved. A base metal film, an oxide and a base insulating film are formed over a glass substrate. A TFT having a sidewall is formed over the base insulating film, and a metal film is formed to cover the TFT. Annealing is conducted by RTA or the like at such a temperature that does not cause shrinkage of the substrate, and a high-resistant metal silicide layer is formed in source and drain regions. After removing an unreacted metal film, laser irradiation is conducted for the second annealing; therefore a silicide reaction proceeds and the high-resistant metal silicide layer becomes a low-resistant metal silicide layer. In the second annealing, a base metal film absorbs and accumulates heat of the laser irradiation, and a semiconductor layer is supplied with beat of the base metal film in addition to heat of the laser irradiation, thereby enhancing efficiency of the silicide reaction in the source and drain regions.

摘要翻译： 对薄膜集成电路进行自对准处理，而不用担心对玻璃基板的损坏，因此可以实现电路的高速操作。 在玻璃基板上形成贱金属膜，氧化物和基底绝缘膜。 在基底绝缘膜上形成具有侧壁的TFT，并且形成覆盖TFT的金属膜。 在不会引起基板收缩的温度下由RTA等进行退火，在源极和漏极区域形成高阻金属硅化物层。 在除去未反应的金属膜之后，对第二次退火进行激光照射; 因此进行硅化物反应，高阻金属硅化物层变成低电阻金属硅化物层。 在第二退火中，贱金属膜吸收并累积激光照射的热量，并且除了激光照射的热量之外，还向半导体层供给贱金属膜的节拍，从而提高源的硅化物反应的效率 和漏区。

公开(公告)号：US07288480B2

公开(公告)日：2007-10-30

申请号：US11110918

申请日：2005-04-21

申请人： Tetsuji Yamaguchi ,  Atsuo Isobe ,  Satoru Saito

发明人： Tetsuji Yamaguchi ,  Atsuo Isobe ,  Satoru Saito

IPC分类号： H01L21/44

CPC分类号： H01L27/1259 ,  H01L27/1214

摘要： A salicide process is conducted to a thin film integrated circuit without worrying about damages to a glass substrate, and thus, high-speed operation of a circuit can be achieved. A base metal film, an oxide and a base insulating film are formed over a glass substrate. A TFT having a sidewall is formed over the base insulating film, and a metal film is formed to cover the TFT. Annealing is conducted by RTA or the like at such a temperature that does not cause shrinkage of the substrate, and a high-resistant metal silicide layer is formed in source and drain regions. After removing an unreacted metal film, laser irradiation is conducted for the second annealing; therefore a silicide reaction proceeds and the high-resistant metal silicide layer becomes a low-resistant metal silicide layer. In the second annealing, a base metal film absorbs and accumulates heat of the laser irradiation, and a semiconductor layer is supplied with heat of the base metal film in addition to heat of the laser irradiation, thereby enhancing efficiency of the silicide reaction in the source and drain regions.

摘要翻译： 对薄膜集成电路进行自对准处理，而不用担心对玻璃基板的损坏，因此可以实现电路的高速操作。 在玻璃基板上形成贱金属膜，氧化物和基底绝缘膜。 在基底绝缘膜上形成具有侧壁的TFT，并且形成覆盖TFT的金属膜。 在不会引起基板收缩的温度下由RTA等进行退火，在源极和漏极区域形成高阻金属硅化物层。 在除去未反应的金属膜之后，对第二次退火进行激光照射; 因此进行硅化物反应，高阻金属硅化物层变成低电阻金属硅化物层。 在第二退火中，贱金属膜吸收并累积激光照射的热量，并且除了激光照射的热量之外，还向半导体层供应贱金属膜的热量，从而提高源的硅化物反应的效率 和漏区。

公开(公告)号：US20050048744A1

公开(公告)日：2005-03-03

申请号：US10919513

申请日：2004-08-17

申请人： Atsuo Isobe ,  Satoru Saito ,  Saishi Fujikawa

发明人： Atsuo Isobe ,  Satoru Saito ,  Saishi Fujikawa

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L29/786 ,  C30B1/00 ,  H01L21/36

CPC分类号： H01L21/02686 ,  H01L21/02672 ,  H01L21/2022 ,  H01L21/2026 ,  H01L29/66757 ,  H01L29/78675 ,  Y10S438/978

摘要： Since sodium contained in glass, or glass itself has low heat resistance; a CPU fabricated using a TFT formed over a glass substrate or the like has not been obtained. In the case of operating a CPU with high-speed, the length of a gate (gate length) of a TFT is required to be shorter. However, since a glass substrate has large deflection, a gate electrode cannot have been etched to have a gate length short enough to be used for a CPU. According to the invention, a conductive film is formed over a crystalline semiconductor film formed over a glass substrate, a mask is formed over the conductive film, and the conductive film is etched by using the mask; thus, a thin film transistor with a gate length of 1.0 μm or less is formed. In particular, the crystalline semiconductor film is formed by crystallizing an amorphous semiconductor film formed over a glass substrate by laser irradiation.

摘要翻译： 由于玻璃中含有的钠或玻璃本身具有低耐热性; 没有获得使用在玻璃基板等上形成的TFT制造的CPU。 在高速运行CPU的情况下，TFT的栅极长度（栅极长度）要求较短。 然而，由于玻璃基板具有大的偏转，所以栅极电极不能被蚀刻以具有足够短的栅极长度以用于CPU。 根据本发明，在形成在玻璃基板上的结晶半导体膜上形成导电膜，在导电膜上形成掩模，并使用掩模蚀刻导电膜; 因此，形成栅极长度为1.0μm以下的薄膜晶体管。 特别地，通过激光照射使在玻璃基板上形成的非晶半导体膜结晶化而形成结晶半导体膜。

公开(公告)号：US07537979B2

公开(公告)日：2009-05-26

申请号：US11467000

申请日：2006-08-24

申请人： Atsuo Isobe ,  Satoru Saito ,  Saishi Fujikawa

发明人： Atsuo Isobe ,  Satoru Saito ,  Saishi Fujikawa

IPC分类号： H01L21/84

CPC分类号： H01L21/02686 ,  H01L21/02672 ,  H01L21/2022 ,  H01L21/2026 ,  H01L29/66757 ,  H01L29/78675 ,  Y10S438/978

摘要： Since sodium contained in glass, or glass itself has low heat resistance; a CPU fabricated using a TFT formed over a glass substrate or the like has not been obtained. In the case of operating a CPU with high-speed, the length of a gate (gate length) of a TFT is required to be shorter. However, since a glass substrate has large deflection, a gate electrode cannot have been etched to have a gate length short enough to be used for a CPU. According to the invention, a conductive film is formed over a crystalline semiconductor film formed over a glass substrate, a mask is formed over the conductive film, and the conductive film is etched by using the mask; thus, a thin film transistor with a gate length of 1.0 μm or less is formed. In particular, the crystalline semiconductor film is formed by crystallizing an amorphous semiconductor film formed over a glass substrate by laser irradiation.

摘要翻译： 由于玻璃中含有的钠或玻璃本身具有低耐热性; 没有获得使用在玻璃基板等上形成的TFT制造的CPU。 在高速运行CPU的情况下，TFT的栅极长度（栅极长度）要求较短。 然而，由于玻璃基板具有大的偏转，所以栅极电极不能被蚀刻以具有足够短的栅极长度以用于CPU。 根据本发明，在形成在玻璃基板上的结晶半导体膜上形成导电膜，在导电膜上形成掩模，并使用掩模蚀刻导电膜; 因此，形成栅极长度为1.0μm以下的薄膜晶体管。 特别地，通过激光照射使在玻璃基板上形成的非晶半导体膜结晶化而形成结晶半导体膜。

公开(公告)号：US07115488B2

公开(公告)日：2006-10-03

申请号：US10919513

申请日：2004-08-17

申请人： Atsuo Isobe ,  Satoru Saito ,  Saishi Fujikawa

发明人： Atsuo Isobe ,  Satoru Saito ,  Saishi Fujikawa

IPC分类号： H01L21/20

CPC分类号： H01L21/02686 ,  H01L21/02672 ,  H01L21/2022 ,  H01L21/2026 ,  H01L29/66757 ,  H01L29/78675 ,  Y10S438/978

摘要： Since sodium contained in glass, or glass itself has low heat resistance; a CPU fabricated using a TFT formed over a glass substrate or the like has not been obtained. In the case of operating a CPU with high-speed, the length of a gate (gate length) of a TFT is required to be shorter. However, since a glass substrate has large deflection, a gate electrode cannot have been etched to have a gate length short enough to be used for a CPU. According to the invention, a conductive film is formed over a crystalline semiconductor film formed over a glass substrate, a mask is formed over the conductive film, and the conductive film is etched by using the mask; thus, a thin film transistor with a gate length of 1.0 μm or less is formed. In particular, the crystalline semiconductor film is formed by crystallizing an amorphous semiconductor film formed over a glass substrate by laser irradiation.

公开(公告)号：US20060281318A1

公开(公告)日：2006-12-14

申请号：US11467000

申请日：2006-08-24

申请人： Atsuo Isobe ,  Satoru Saito ,  Saishi Fujikawa

发明人： Atsuo Isobe ,  Satoru Saito ,  Saishi Fujikawa

IPC分类号： H01L21/311

CPC分类号： H01L21/02686 ,  H01L21/02672 ,  H01L21/2022 ,  H01L21/2026 ,  H01L29/66757 ,  H01L29/78675 ,  Y10S438/978

摘要： Since sodium contained in glass, or glass itself has low heat resistance; a CPU fabricated using a TFT formed over a glass substrate or the like has not been obtained. In the case of operating a CPU with high-speed, the length of a gate (gate length) of a TFT is required to be shorter. However, since a glass substrate has large deflection, a gate electrode cannot have been etched to have a gate length short enough to be used for a CPU. According to the invention, a conductive film is formed over a crystalline semiconductor film formed over a glass substrate, a mask is formed over the conductive film, and the conductive film is etched by using the mask; thus, a thin film transistor with a gate length of 1.0 μm or less is formed. In particular, the crystalline semiconductor film is formed by crystallizing an amorphous semiconductor film formed over a glass substrate by laser irradiation.

摘要翻译： 由于玻璃中含有的钠或玻璃本身具有低耐热性; 没有获得使用在玻璃基板等上形成的TFT制造的CPU。 在高速运行CPU的情况下，TFT的栅极长度（栅极长度）要求较短。 然而，由于玻璃基板具有大的偏转，所以栅极电极不能被蚀刻以具有足够短的栅极长度以用于CPU。 根据本发明，在形成在玻璃基板上的结晶半导体膜上形成导电膜，在导电膜上形成掩模，并使用掩模蚀刻导电膜; 因此，形成栅极长度为1.0μm以下的薄膜晶体管。 特别地，通过激光照射使在玻璃基板上形成的非晶半导体膜结晶化而形成结晶半导体膜。