High-performance ECC decoder
    1.
    发明授权

    公开(公告)号:US08484544B2

    公开(公告)日:2013-07-09

    申请号:US13590565

    申请日:2012-08-21

    IPC分类号: H03M13/00

    摘要: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

    HIGH-PERFORMANCE ECC DECODER
    2.
    发明申请
    HIGH-PERFORMANCE ECC DECODER 有权
    高性能ECC解码器

    公开(公告)号:US20120317457A1

    公开(公告)日:2012-12-13

    申请号:US13590565

    申请日:2012-08-21

    IPC分类号: H03M13/29 G06F11/10

    摘要: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

    摘要翻译: 用于纠错码(ECC)解码的方法包括从表示已经用ECC编码的数据的一组位产生综合征。 错误定位器多项式(ELP)是基于综合征产生的。 识别至少一些ELP根,并校正由这些根指示的错误。 可以通过应用向量空间中的比特向量操作来产生每个综合征。 通过使用向量空间的不同基础应用向量运算来产生每个综合征。 可以通过使用串行乘法器对ELP系数进行操作,在给定的场元件上评估ELP,其中每个串行乘法器执行乘法周期序列,并在每个周期中产生中间结果。 响应于检测至少一个中期结果,指示给定的元素不是ELP根,在完成序列之前终止乘法循环。

    High-performance ECC decoder
    3.
    发明授权
    High-performance ECC decoder 有权
    高性能ECC解码器

    公开(公告)号:US08327242B1

    公开(公告)日:2012-12-04

    申请号:US12419304

    申请日:2009-04-07

    IPC分类号: H03M13/00

    摘要: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

    摘要翻译: 用于纠错码(ECC)解码的方法包括从表示已经用ECC编码的数据的一组位产生综合征。 错误定位器多项式(ELP)是基于综合征产生的。 识别至少一些ELP根,并校正由这些根指示的错误。 可以通过应用向量空间中的比特向量操作来产生每个综合征。 通过使用向量空间的不同基础应用向量运算来产生每个综合征。 可以通过使用串行乘法器对ELP系数进行操作,在给定的场元件上评估ELP,其中每个串行乘法器执行乘法周期序列,并在每个周期中产生中间结果。 响应于检测至少一个中期结果,指示给定的元素不是ELP根,在完成序列之前终止乘法循环。

    Efficient LDPC codes
    4.
    发明授权

    公开(公告)号:US08601352B1

    公开(公告)日:2013-12-03

    申请号:US12843029

    申请日:2010-07-25

    IPC分类号: G06F11/00

    摘要: A method includes accepting a definition of a mother Error Correction Code (ECC) that is represented by a set of parity check equations and includes first code words, and a definition of a punctured ECC that includes second code words and is derived from the mother ECC by removal of one or more of the parity check equations and removal of one or more punctured check symbols selected from among check symbols of the first code words. A mother decoder, which is designed to decode the mother ECC by exchanging messages between symbol nodes and check nodes in accordance with a predefined interconnection scheme that represents the mother ECC, is provided. An input code word of the punctured ECC is decoded using the mother decoder by initializing one or more of the symbol nodes and controlling one or more of the messages, and while retaining the interconnection scheme.

    Dual ECC decoder
    5.
    发明授权
    Dual ECC decoder 有权
    双ECC解码器

    公开(公告)号:US08429498B1

    公开(公告)日:2013-04-23

    申请号:US12728289

    申请日:2010-03-22

    IPC分类号: G11C29/00

    CPC分类号: G06F11/1048 G11C2029/0411

    摘要: A decoding apparatus includes a decoder and a control unit. The decoder includes circuitry that is configured to decode an Error Correction Code (ECC) by operating in one of a first operational mode having a first power consumption, and a second operational mode, in which at least part of the circuitry that is active during the first operational mode is deactivated and which has a second power consumption that is lower than the first power consumption. The control unit is configured to evaluate a criterion with respect to an input code word, to select one of the first and second operational modes responsively to the criterion, and to invoke the decoder to decode the input code word using the selected operational mode.

    摘要翻译: 解码装置包括解码器和控制单元。 解码器包括经配置以通过以具有第一功率消耗的第一操作模式和第二操作模式之一进行操作来解码错误校正码(ECC)的电路,其中在该期间内的有效电路的至少一部分 第一操作模式被禁用并且具有低于第一功率消耗的第二功率消耗。 控制单元被配置为评估关于输入代码字的标准,以响应于该标准选择第一和第二操作模式中的一个,并且使用所选择的操作模式调用解码器对输入的代码字进行解码。

    Read threshold setting based on soft readout statistics
    6.
    发明授权
    Read threshold setting based on soft readout statistics 有权
    基于软读出统计读取阈值设置

    公开(公告)号:US08694854B1

    公开(公告)日:2014-04-08

    申请号:US13195852

    申请日:2011-08-02

    IPC分类号: G11C29/00

    摘要: A method for data storage includes storing data in analog memory cells by programming the memory cells with respective analog input values. After storing the data, respective analog output values are read from the memory cells using multiple read thresholds, which define multiple ranges of the analog output values. Respective numbers of read errors in the data, corresponding to the analog output values falling in the ranges, are assessed. The stored data is recovered based on respective numbers of the read errors assessed in the ranges.

    摘要翻译: 一种用于数据存储的方法包括通过用相应的模拟输入值对存储器单元进行编程来将数据存储在模拟存储器单元中。 在存储数据之后,使用多个读取阈值从存储器单元中读取相应的模拟输出值,该阈值定义了模拟输出值的多个范围。 对与数据范围内的模拟输出值相对应的数据中读取错误的数量进行了评估。 基于在范围内评估的读取错误的相应数量来恢复所存储的数据。

    PARAMETER ESTIMATION USING PARTIAL ECC DECODING
    7.
    发明申请
    PARAMETER ESTIMATION USING PARTIAL ECC DECODING 有权
    使用部分ECC解码的参数估计

    公开(公告)号:US20140059403A1

    公开(公告)日:2014-02-27

    申请号:US13595669

    申请日:2012-08-27

    IPC分类号: H03M13/03 G06F11/10

    摘要: In some embodiments, a method includes accepting a code word of a composite Error Correction Code (ECC), which was produced by encoding data with multiple component ECCs, and which was received with one or more reception parameters. One or more of the component ECCs are decoded, but without fully decoding the code word. The one or more reception parameters are estimated based on the decoded component ECCs. In other embodiments, a method includes accepting a code word of an ECC, which encodes data and which was received with one or more reception parameters. An Error Locator Polynomial (ELP), having one or more roots that indicate respective locations of one or more errors in the code word, is derived from the accepted code word. The one or more reception parameters are estimated based on the ELP.

    摘要翻译: 在一些实施例中,一种方法包括接受通过用多个组件ECC编码数据并且被一个或多个接收参数接收的复合错误校正码(ECC)的码字。 一个或多个组件ECC被解码,但没有完全解码码字。 基于解码的组件ECC来估计一个或多个接收参数。 在其他实施例中,一种方法包括接受ECC的代码字,该代码字对数据进行编码并且用一个或多个接收参数接收。 错误定位器多项式(ELP)从识别的代码字导出,具有指示码字中的一个或多个错误的相应位置的一个或多个根。 基于ELP估计一个或多个接收参数。

    Interference-aware assignment of programming levels in analog memory cells
    9.
    发明授权
    Interference-aware assignment of programming levels in analog memory cells 有权
    模拟存储器单元中编程级别的干扰感知分配

    公开(公告)号:US08595591B1

    公开(公告)日:2013-11-26

    申请号:US13176761

    申请日:2011-07-06

    摘要: A method for data storage includes accepting data for storage in a memory including multiple analog memory cells. For each memory cell, a respective set of nominal analog values is assigned for representing data values to be stored in the memory cell, by choosing the nominal analog values for a given memory cell in a respective range that depends on interference between the given memory cell and at least one other memory cell in the memory. The data is stored in each memory cell using the respective selected set of the nominal analog values.

    摘要翻译: 一种用于数据存储的方法包括接收用于存储在包括多个模拟存储器单元的存储器中的数据。 对于每个存储器单元,通过在取决于给定存储器单元之间的干扰的相应范围内选择给定存储器单元的额定模拟值,分配相应的一组标称模拟值来表示要存储在存储单元中的数据值 以及存储器中的至少一个其它存储单元。 使用相应选定的标称模拟值集合将数据存储在每个存储单元中。

    Data scrambling schemes for memory devices
    10.
    发明授权
    Data scrambling schemes for memory devices 有权
    存储器件的数据加扰方案

    公开(公告)号:US08578243B2

    公开(公告)日:2013-11-05

    申请号:US13565122

    申请日:2012-08-02

    IPC分类号: G06F11/00

    CPC分类号: G06F11/1048

    摘要: A method for data storage includes defining a set of scrambling sequences, each sequence including bits in respective bit positions having bit values, such that a distribution of the bit values in any give bit position satisfies a predefined statistical criterion. Each data word is scrambled using a respective scrambling sequence selected from the set. The scrambled data words are stored in the memory device.

    摘要翻译: 一种用于数据存储的方法包括定义一组加扰序列,每个序列包括具有比特值的相应比特位置中的比特,使得任何给定比特位置中的比特值的分布满足预定义的统计标准。 使用从集合中选择的相应加扰序列对每个数据字进行加扰。 加扰的数据字被存储在存储器件中。