Power management for computer systems
    1.
    发明授权
    Power management for computer systems 有权
    电脑系统电源管理

    公开(公告)号:US06711691B1

    公开(公告)日:2004-03-23

    申请号:US09567201

    申请日:2000-05-08

    IPC分类号: G06F132

    摘要: Power management approaches for computer systems having one or more processors are disclosed. One power management approach provides hierarchical power management. The hierarchical nature of the power management provided by the invention has various levels of power management such that power consumption of the computer system is dependent upon the amount of work placed on the processing resources of the computer system. Another power management approach pertains to deterministic handshaking provided between a power manager and one or more controller units. The deterministic handshaking provides for more reliable and controllable transitions between power management states which have associated power management taking place in the controller units. The power management approaches are suitable for use with a single-processor computer system or a multi-processor computer system.

    摘要翻译: 公开了具有一个或多个处理器的计算机系统的电源管理方法。 一种电源管理方法提供分层电源管理。 本发明提供的电源管理的层次性质具有各种电源管理级别,使得计算机系统的功耗取决于对计算机系统的处理资源的工作量。 另一种功率管理方法涉及在功率管理器和一个或多个控制器单元之间提供的确定性握手。 确定性握手提供了在控制器单元中发生相关电源管理的电源管理状态之间更可靠和可控的转换。 电源管理方法适用于单处理器计算机系统或多处理器计算机系统。

    Stable clock generation internal to a functional integrated circuit chip
    2.
    发明授权
    Stable clock generation internal to a functional integrated circuit chip 有权
    功能集成电路芯片内部稳定的时钟产生

    公开(公告)号:US06654898B1

    公开(公告)日:2003-11-25

    申请号:US09567196

    申请日:2000-05-08

    IPC分类号: G06F104

    摘要: Methods and apparatus that provide stable clock generation within a functional integrated circuit are disclosed. The functional integrated circuit provides a function other than clock generation, such as a peripheral or interrupt control. Typically, the clock generation is phase-lock loop (PLL) based. The functional integrated circuit also typically provides power savings modes to conserve power consumption.

    摘要翻译: 公开了在功能集成电路内提供稳定时钟产生的方法和装置。 功能集成电路提供时钟生成以外的功能,例如外设或中断控制。 通常,时钟产生是基于锁相环(PLL)的。 功能集成电路通常也提供省电模式以节省功耗。

    Power managed graphics controller
    4.
    发明授权
    Power managed graphics controller 有权
    电源管理图形控制器

    公开(公告)号:US06820209B1

    公开(公告)日:2004-11-16

    申请号:US09566651

    申请日:2000-05-08

    IPC分类号: G06F1314

    摘要: A controller (or controller chip) providing reduced power consumption without impacting performance is disclosed. The controller monitors activity of components within the controller which require access to a local memory, and then decreases a clocking frequency for a memory interface to the local memory when the monitoring indicates that reduced amounts of activity are present. Following such a decrease in the clocking frequency, when increased amounts of activity are detected, the clocking frequency is increased for high performance operation. The controller thus tailors the clocking frequency for the memory interface in accordance with the amount of activity of these components that require access to the local memory so that overall less power is used by the controller yet the performance is essentially not hindered. In one embodiment, the controller is a graphics controller, as such controllers require access to local memories.

    摘要翻译: 公开了一种在不影响性能的情况下提供降低功耗的控制器(或控制器芯片)。 控制器监视控制器内部需要访问本地存储器的组件的活动,然后当监视指示存在减少的活动量时,将本地存储器的存储器接口的时钟频率降低。 随着时钟频率的这种降低,当检测到增加的活动量时,为了高性能操作,时钟频率增加。 因此,控制器根据需要访问本地存储器的这些组件的活动量来定制存储器接口的时钟频率,使得控制器使用总体较少的功率,但性能基本上不受阻碍。 在一个实施例中,控制器是图形控制器,因此这些控制器需要访问本地存储器。

    Apparatus and method for awakening bus circuitry from a low power state
    5.
    发明授权
    Apparatus and method for awakening bus circuitry from a low power state 有权
    从低功率状态唤醒总线电路的装置和方法

    公开(公告)号:US06460143B1

    公开(公告)日:2002-10-01

    申请号:US09340762

    申请日:1999-06-28

    IPC分类号: G06F126

    摘要: Apparatus and techniques for awakening bus circuitry from an inactive state as needed are described. The bus circuitry forms part of a computer system and is placed in the inactive state (i.e., shut down) when not needed so as to conserve power. The bus circuitry is associated with a bus and can be awakened out of the inactive state when certain bus events, including resume, connect or disconnect, occur on the bus. The invention is particularly advantageous for computing devices (e.g., portable computers, desktop computers, server computers) where it is desirous to shut down bus circuitry as well as other circuitry (e.g., microprocessor) when not needed so as to reduce power consumption.

    摘要翻译: 描述了根据需要将总线电路从非活动状态唤醒的装置和技术。 总线电路构成计算机系统的一部分,并且当不需要时被置于非活动状态(即,关闭)以节省功率。 总线电路与总线相关联,并且当总线上发生某些总线事件(包括恢复连接或断开)时,可以将其唤醒到不活动状态。 本发明对于计算未需要关闭总线电路以及其它电路(例如,微处理器)以减少功耗的计算设备(例如,便携式计算机,台式计算机,服务器计算机)特别有利。

    Apparatus and method for awakening bus circuitry from a low power state
    6.
    发明授权
    Apparatus and method for awakening bus circuitry from a low power state 有权
    从低功率状态唤醒总线电路的装置和方法

    公开(公告)号:US06708278B2

    公开(公告)日:2004-03-16

    申请号:US10210734

    申请日:2002-07-31

    IPC分类号: G06F126

    摘要: Apparatus and techniques for awakening bus circuitry from an inactive state as needed are described. The bus circuitry forms part of a computer system and is placed in the inactive state (i.e., shut down) when not needed so as to conserve power. The bus circuitry is associated with a bus and can be awakened out of the inactive state when certain bus events, including resume, connect or disconnect, occur on the bus. The invention is particularly advantageous for computing devices (e.g., portable computers, desktop computers, server computers) where it is desirous to shut down bus circuitry as well as other circuitry (e.g., microprocessor) when not needed so as to reduce power consumption.

    摘要翻译: 描述了根据需要将总线电路从非活动状态唤醒的装置和技术。 总线电路构成计算机系统的一部分,并且当不需要时被置于非活动状态(即,关闭)以节省功率。 总线电路与总线相关联,并且当总线上发生某些总线事件(包括恢复连接或断开)时,可以将其唤醒到不活动状态。 本发明对于计算未需要关闭总线电路以及其它电路(例如,微处理器)的计算设备(例如,便携式计算机,台式计算机,服务器计算机)特别有利,以便降低功耗。

    Method and apparatus for switching between graphics sources
    7.
    发明授权
    Method and apparatus for switching between graphics sources 有权
    用于在图形源之间切换的方法和装置

    公开(公告)号:US08681159B2

    公开(公告)日:2014-03-25

    申请号:US11499167

    申请日:2006-08-04

    IPC分类号: G06F15/16

    摘要: One embodiment of the present invention provides a system that switches from a first graphics processor to a second graphics processor to drive a display. During operation, the system receives a request to switch a signal source which drives the display from the first graphics processor to the second graphics processor. In response to the request, the system first configures the second graphics processor so that the second graphics processor is ready to drive the display. Next, the system switches the signal source that drives the display from the first graphics processor to the second graphics processor, thereby causing the second graphics processor to drive the display.

    摘要翻译: 本发明的一个实施例提供一种从第一图形处理器切换到第二图形处理器以驱动显示器的系统。 在操作期间,系统接收将驱动显示器的信号源从第一图形处理器切换到第二图形处理器的请求。 响应于该请求,系统首先配置第二图形处理器,使得第二图形处理器准备驱动显示器。 接下来,系统将驱动显示器的信号源从第一图形处理器切换到第二图形处理器,从而使第二图形处理器驱动显示器。

    Chroma-key video blending with improved compression
    8.
    发明授权
    Chroma-key video blending with improved compression 有权
    Chroma-Key视频混合与改进的压缩

    公开(公告)号:US08605796B2

    公开(公告)日:2013-12-10

    申请号:US12777926

    申请日:2010-05-11

    IPC分类号: H04N11/02

    摘要: A computer readable medium for compressing video data with an edit track is provided. Generally, computer readable code for compressing video data is provided. The computer readable code for compressing comprises computer readable code for accessing the edit track to use data in the edit track during the compressing. A method of compressing video data with an edit track is provided. Generally, video data is compressed. The compressing comprises accessing the edit track to use data in the edit track during the compressing. A system for compressing video data is also provided. An edit track reader for accesses data within the edit track and generates instructions based on the data within the data track. A video compressor receives instruction from the edit track reader and receives the edited video track and audio track, and compresses the edited video according to the instructions from the edit track reader.

    摘要翻译: 提供了一种用于利用编辑轨道压缩视频数据的计算机可读介质。 通常,提供用于压缩视频数据的计算机可读代码。 用于压缩的计算机可读代码包括用于在压缩期间访问编辑轨道以使用编辑轨道中的数据的计算机可读代码。 提供了一种使用编辑轨道压缩视频数据的方法。 通常,视频数据被压缩。 压缩包括在压缩期间访问编辑轨道以使用编辑轨道中的数据。 还提供了一种用于压缩视频数据的系统。 用于在编辑轨道内访问数据的编辑轨道读取器,并且基于数据轨道内的数据生成指令。 视频压缩器从编辑轨道读取器接收指令并接收编辑的视频轨道和音轨,并根据来自编辑轨道读取器的指令来压缩编辑的视频。

    Thermal management techniques in an electronic device
    10.
    发明授权
    Thermal management techniques in an electronic device 有权
    电子设备中的热管理技术

    公开(公告)号:US08315746B2

    公开(公告)日:2012-11-20

    申请号:US12370946

    申请日:2009-02-13

    摘要: A thermal manager has a digital filter whose input is to receive raw temperature values from a sensor and whose output is to provide processed or filtered temperature values according to a filter function that correlates temperature at the sensor with temperature at another location in the device. The thermal manager has a look-up table that further correlates temperature at the sensor with temperature at the other location. The look-up table contains a list of processed temperature sensor values, and/or a list of temperatures representing the temperature at the other location, and their respective power consumption change commands. The thermal manager accesses the look-up table using selected, filtered temperature values, to identify their respective power consumption change commands. The latter are then evaluated and may be applied, to mitigate a thermal at the other location. Other embodiments are also described and claimed.

    摘要翻译: 热管理器具有数字滤波器,其输入用于从传感器接收原始温度值,其输出是根据将传感器温度与设备中另一位置处的温度相关联的滤波器功能提供经处理或过滤的温度值。 热管理器有一个查找表,进一步将传感器的温度与其他位置的温度相关联。 查找表包含处理的温度传感器值的列表和/或表示其他位置的温度的温度列表及其各自的功率消耗改变命令。 热管理器使用选定的过滤温度值访问查找表,以识别其各自的功耗变化命令。 然后对后者进行评估并且可以被应用,以减轻在另一位置处的热量。 还描述和要求保护其他实施例。