公开(公告)号：US06708288B1

公开(公告)日：2004-03-16

申请号：US09702590

申请日：2000-10-31

申请人： Michael L. Ziegler ,  Lawrence D. K. B. Dwyer ,  Carol L. Thompson

发明人： Michael L. Ziegler ,  Lawrence D. K. B. Dwyer ,  Carol L. Thompson

IPC分类号： G06F1100

CPC分类号： G06F11/1407 ,  G06F11/1469

摘要： Compiler-based checkpointing for error recovery. In various embodiments, a compiler is adapted to identify checkpoints in program code. Sets of data objects are associated with the checkpoints, and checkpoint code is generated by the compiler for execution at the checkpoints. The checkpoint code stores state information of the associated data objects for recovery if execution of the program is interrupted.

摘要翻译： 基于编译器的检查点进行错误恢复。 在各种实施例中，编译器适于识别程序代码中的检查点。 数据对象集合与检查点相关联，检查点代码由编译器生成，以便在检查点执行。 如果程序的执行中断，则检查点代码存储用于恢复的相关联的数据对象的状态信息。

公开(公告)号：US06845501B2

公开(公告)日：2005-01-18

申请号：US09917535

申请日：2001-07-27

申请人： Carol L. Thompson ,  Michael L. Zi gler ,  Jerome C. Huck ,  Lawrence D. K. B. Dwyer

发明人： Carol L. Thompson ,  Michael L. Zi gler ,  Jerome C. Huck ,  Lawrence D. K. B. Dwyer

IPC分类号： G06F9/38 ,  G06F9/45

CPC分类号： G06F9/383

摘要： A method for reducing cache memory misses in a computer that performs context switches between at least a first context and a second context. A First logic identifies a first prefetch region in a first memory element and a second logic identifies critical memory references within the first prefetch region during compilation of a computer program. The critical memory references within the first prefetch region correspond to data in cache memory if a context switch occurs from a process or thread associated with the second context to a process or thread associated with the first context during program execution. Third logic prefetches data associated with the identified critical memory references and stores the prefetched data in cache memory prior to a process or thread associated with the first context being resumed when a switch from the second context to the first context occurs during program execution.

摘要翻译： 一种用于减少在至少第一上下文和第二上下文之间进行上下文切换的计算机中的高速缓冲存储器缺失的方法。 A第一逻辑识别第一存储器元件中的第一预取区域，并且第二逻辑在汇编计算机程序期间识别第一预取区域内的关键存储器引用。 如果在程序执行期间如果从与第二上下文相关联的进程或线程发生到与第一上下文相关联的进程或线程的上下文切换，则第一预取区域内的关键内存引用对应于高速缓冲存储器中的数据。 第三逻辑预取与所识别的关键存储器引用相关联的数据，并且当在程序执行期间发生从第二上下文到第一上下文的切换时，在与第一上下文相关联的进程或线程之前，将预取数据存储在高速缓冲存储器中。

公开(公告)号：US06701518B1

公开(公告)日：2004-03-02

申请号：US09631552

申请日：2000-08-03

申请人： Lawrence D. K. B. Dwyer ,  Carol L. Thompson

发明人： Lawrence D. K. B. Dwyer ,  Carol L. Thompson

IPC分类号： G06F944

CPC分类号： G06F11/3624 ,  G06F8/52

摘要： The present invention relates to a system and method for reducing the adverse impact of assertion instructions to processor performance so that programmers will be encouraged to include assertion instructions in computer programs. The system of the present invention includes memory and a compiler. The memory stores a first program to be compiled by the compiler. The compiler, in compiling the first program, translates a first function of the first program into a second function of a second program. The first function has assertion instructions that are translated by the compiler into translated assertion instructions, which are included in the second function. In compiling the first program, the compiler enables selective execution, based on a run time input, of a portion of the translated assertion instructions included in the second function.

摘要翻译： 本发明涉及一种用于减少断言指令对处理器性能的不利影响的系统和方法，以便鼓励程序员在计算机程序中包括断言指令。 本发明的系统包括存储器和编译器。 内存存储由编译器编译的第一个程序。 编译器在编译第一程序时将第一程序的第一功能转换为第二程序的第二功能。 第一个函数具有由编译器转换成被转换为断言指令的断言指令，这些指令包含在第二个函数中。 在编译第一程序时，编译器使得能够基于运行时间输入来选择性地执行包括在第二功能中的翻译的断言指令的一部分。

公开(公告)号：US06880153B1

公开(公告)日：2005-04-12

申请号：US09718059

申请日：2000-11-21

申请人： Carol L. Thompson ,  Michael L. Ziegler

发明人： Carol L. Thompson ,  Michael L. Ziegler

IPC分类号： G06F9/45 ,  G06F11/36

CPC分类号： G06F11/3644 ,  G06F11/3688

摘要： The present invention provides a method (FIG. 6) and an apparatus that enable spare instruction slots within a code module to be utilized opportunistically for insertion of instructions associated with correctness check functions. During the generation of the initial instruction schedule, the compiler examines the initial instruction schedule and determines locations of spare instruction slots that can potentially be utilized for insertion of the correctness check code sequences. If a sufficient number of spare instruction slots exist to accommodate the correctness check code sequences, the sequences are inserted into the instruction schedule. If an insufficient number of spare instruction slots exist to accommodate a code sequence, the compiler adds additional instruction slots if a sufficient number of additional instruction slots can be added for insertion of the check sequences without exceeding a run-time performance cost tolerance level designated by a user.

摘要翻译： 本发明提供了一种方法（图6）和一种使代码模块中的备用指令槽能够机会地用于插入与正确性检查功能相关联的指令的装置。 在生成初始指令调度期间，编译器检查初始指令调度并确定可能用于插入正确性校验码序列的备用指令时隙的位置。 如果存在足够数量的备用指令槽以适应正确性校验码序列，则将该序列插入到指令调度中。 如果存在足够数量的备用指令槽以容纳代码序列，则如果可以添加足够数量的附加指令槽来插入校验序列，则编译器将添加附加指令槽，而不超过由校验序列指定的运行时性能成本容限级别 一个用户

公开(公告)号：US06874138B1

公开(公告)日：2005-03-29

申请号：US09724616

申请日：2000-11-28

申请人： Michael L. Ziegler ,  Carol L. Thompson

发明人： Michael L. Ziegler ,  Carol L. Thompson

IPC分类号： G06F9/44 ,  G06F11/00 ,  G06F11/14

CPC分类号： G06F11/1438 ,  G06F11/1489

摘要： Method and apparatus for resuming execution of a failed computer program. A program is compiled using two compilers to generate first and second sets of object code. Checkpoints are identified in the program, and checkpoint code is generated for execution at the checkpoints. If execution of the first set of object code fails, checkpoint data is recovered and execution of the program is resumed using either the first or second set of object code. In one embodiment, the first set of object code is re-executed before trying the second set of object code.

摘要翻译： 恢复执行故障计算机程序的方法和装置。 使用两个编译器编译程序来生成第一组和第二组目标代码。 检查点在程序中标识，生成检查点代码以便在检查点执行。 如果第一组目标代码的执行失败，则检查点数据被恢复，并且使用第一组或第二组目标代码恢复程序的执行。 在一个实施例中，在尝试第二组目标代码之前重新执行第一组目标代码。

公开(公告)号：US07272702B2

公开(公告)日：2007-09-18

申请号：US10702252

申请日：2003-11-06

申请人： Achmed Rumi Zahir ,  Cary A. Coutant ,  Carol L. Thompson ,  Jonathan K. Ross

发明人： Achmed Rumi Zahir ,  Cary A. Coutant ,  Carol L. Thompson ,  Jonathan K. Ross

IPC分类号： G06F9/34

CPC分类号： G06F9/30123 ,  G06F9/30134 ,  G06F9/384 ,  G06F9/3842 ,  G06F9/3861

摘要： Method and apparatus for managing access to registers that are outside a current register stack frame are disclosed. An instruction execution unit in a processor receives an instruction to be executed. A processor includes a register stack, the register stack including a plurality of register stack frames. Each of the register stack frames includes zero or more registers. One of the plurality of register stack frames is a current register stack frame. When execution of the instruction requires writing to a register referenced by the instruction, the instruction execution unit determines whether the register referenced by the instruction is within the current register stack frame. If the instruction execution unit determines that the register is not within the current register stack frame, the instruction execution unit does not execute the instruction and may, for example, generate a fault. The instruction execution unit executes the instruction is the instruction execution unit determines that the register is within the current register stack frame. When execution of the instruction requires reading from a register referenced by the instruction, the instruction execution unit executes the instruction whether or not the register referenced by the instruction is within the current register stack frame.

摘要翻译： 公开了用于管理对当前寄存器堆栈帧之外的寄存器的访问的方法和装置。 处理器中的指令执行单元接收要执行的指令。 处理器包括寄存器堆栈，寄存器堆栈包括多个寄存器堆栈帧。 每个寄存器堆栈帧包括零个或多个寄存器。 多个寄存器堆栈帧中的一个是当前寄存器堆栈帧。 当执行指令需要写入由指令引用的寄存器时，指令执行单元确定该指令引用的寄存器是否在当前寄存器堆栈帧内。 如果指令执行单元确定寄存器不在当前寄存器堆栈帧内，则指令执行单元不执行指令，并且例如可能产生故障。 指令执行单元执行指令是指令执行单元确定寄存器在当前寄存器堆栈帧内。 当指令的执行需要从指令引用的寄存器读取时，指令执行单元执行指令，该指令是否由指令引用的寄存器是否在当前寄存器堆栈帧内。

公开(公告)号：US06658656B1

公开(公告)日：2003-12-02

申请号：US09702592

申请日：2000-10-31

申请人： Carol L. Thompson

发明人： Carol L. Thompson

IPC分类号： G06F945

CPC分类号： G06F11/1489 ,  G06F8/443 ,  G06F11/1471 ,  G06F11/3628

摘要： Method and apparatus for creating alternative versions of code segments and dynamically substituting execution of the alternative code versions. Checkpoints in program code are identified by a compiler, and the checkpoints are used to delineate segments of object code. Two sets of segments of object code are generated, where the first and second sets of object code segments are optimized at different levels. In one embodiment, the first set of segments are optimized at a greater level than the second set of segments. Upon detecting a program error in executing the first set of segments, state information of the program is recovered from a checkpoint, and an object code module is selected from either the first set or second set for execution.

摘要翻译： 用于创建替代版本的代码段并动态替代替代代码版本的执行的方法和装置。 程序代码中的检查点由编译器识别，检查点用于描绘目标代码段。 生成两组目标代码段，其中第一组和第二组目标代码段在不同级别进行优化。 在一个实施例中，第一组段以比第二组段更高的级别进行优化。 在检测到执行第一组段时的程序错误时，从检查点恢复程序的状态信息，并且从第一组或第二组中选择目标代码模块进行执行。

公开(公告)号：US06263401B1

公开(公告)日：2001-07-17

申请号：US08940834

申请日：1997-09-30

申请人： Jonathan K. Ross ,  Cary A. Coutant ,  Carol L. Thompson ,  Achmed R. Zahir

发明人： Jonathan K. Ross ,  Cary A. Coutant ,  Carol L. Thompson ,  Achmed R. Zahir

IPC分类号： G06F9315

CPC分类号： G06F9/463 ,  G06F9/30105 ,  G06F9/30127 ,  G06F9/30134

摘要： A computer-implemented method and apparatus for transferring the contents of a general register, in a register stack, to a location in a backing store in a main memory are described. When transferring the contents of a general register to a location in the backing store, the invention proposes collecting attribute bits included in each general register of a predetermined group of registers in a temporary collection register. Once the temporary collection register has been filled, the contents of this register are written to the next available location in the backing store. Similarly, on the restoration of registers from the backing store, a collection of attribute bits saved in the backing register is transferred to a temporary collection register. Thereafter, each attribute bit is saved together with associated data into a general register, thereby to restore the former contents of each general register.

摘要翻译： 描述了一种用于将寄存器堆栈中的通用寄存器的内容传送到主存储器中的后备存储器中的位置的计算机实现的方法和装置。 当将通用寄存器的内容传送到后备存储器中的位置时，本发明提出收集临时收集寄存器中预定寄存器组的每个通用寄存器中包含的属性位。 一旦临时收集寄存器被填写，该寄存器的内容将被写入后备存储中的下一个可用位置。 类似地，在从后台存储器恢复寄存器时，保存在后备寄存器中的属性位的集合被传送到临时收集寄存器。 此后，每个属性位与相关联的数据一起保存到通用寄存器中，从而恢复每个通用寄存器的前一个内容。

公开(公告)号：US07334112B2

公开(公告)日：2008-02-19

申请号：US10702355

申请日：2003-11-06

申请人： Achmed Rumi Zahir ,  Cary A. Coutant ,  Carol L. Thompson ,  Jonathan K. Ross

发明人： Achmed Rumi Zahir ,  Cary A. Coutant ,  Carol L. Thompson ,  Jonathan K. Ross

IPC分类号： G06F9/312

CPC分类号： G06F9/30123 ,  G06F9/30134 ,  G06F9/384 ,  G06F9/3842 ,  G06F9/3861

摘要： Method and apparatus for managing access to registers that are outside a current register stack frame are disclosed. An instruction execution unit in a processor receives an instruction to be executed. A processor includes a register stack, the register stack including a plurality of register stack frames. Each of the register stack frames includes zero or more registers. One of the plurality of register stack frames is a current register stack frame. When execution of the instruction requires writing to a register referenced by the instruction, the instruction execution unit determines whether the register referenced by the instruction is within the current register stack frame. If the instruction execution unit determines that the register is not within the current register stack frame, the instruction execution unit does not execute the instruction and may, for example, generate a fault. The instruction execution unit executes the instruction is the instruction execution unit determines that the register is within the current register stack frame. When execution of the instruction requires reading from a register referenced by the instruction, the instruction execution unit executes the instruction whether or not the register referenced by the instruction is within the current register stack frame.

摘要翻译： 公开了用于管理对当前寄存器堆栈帧之外的寄存器的访问的方法和装置。 处理器中的指令执行单元接收要执行的指令。 处理器包括寄存器堆栈，寄存器堆栈包括多个寄存器堆栈帧。 每个寄存器堆栈帧包括零个或多个寄存器。 多个寄存器堆栈帧中的一个是当前寄存器堆栈帧。 当执行指令需要写入由指令引用的寄存器时，指令执行单元确定该指令引用的寄存器是否在当前寄存器堆栈帧内。 如果指令执行单元确定寄存器不在当前寄存器堆栈帧内，则指令执行单元不执行指令，并且例如可能产生故障。 指令执行单元执行指令是指令执行单元确定寄存器在当前寄存器堆栈帧内。 当指令的执行需要从指令引用的寄存器读取时，指令执行单元执行指令，该指令是否由指令引用的寄存器是否在当前寄存器堆栈帧内。

公开(公告)号：US07013460B2

公开(公告)日：2006-03-14

申请号：US09858241

申请日：2001-05-15

申请人： Carol L. Thompson ,  Jeff Littfin

发明人： Carol L. Thompson ,  Jeff Littfin

IPC分类号： G06F9/45

CPC分类号： G06F9/44589 ,  G06F11/0751 ,  G06F11/3612

摘要： Method and apparatus for verifying at runtime an invariant property of a data structure. In various example embodiments, code that verifies whether a runtime value of the data structure is consistent with the invariant property is automatically generated in response to an annotation of the data structure in the source code. In executing the program, the runtime value of the data structure is compared to the invariant property in the automatically generated code. If the runtime property is inconsistent with the invariant property, the program branches to exception handler code.

摘要翻译： 用于在运行时验证数据结构的不变属性的方法和装置。 在各种示例实施例中，响应于源代码中的数据结构的注释，自动生成验证数据结构的运行时值是否与不变属性一致的代码。 在执行程序时，将数据结构的运行时值与自动生成代码中的不变属性进行比较。 如果运行时属性与不变属性不一致，程序将分支到异常处理程序代码。