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    Resistor fuse
    1.
    发明授权
    Resistor fuse 有权
    电阻保险丝

    公开(公告)号：US06356496B1

    公开(公告)日：2002-03-12

    申请号：US09612052

    申请日：2000-07-07

    申请人： Michael Scott Carroll ,  Frank Yauchee Hui ,  Tony G. Ivanov

    发明人： Michael Scott Carroll ,  Frank Yauchee Hui ,  Tony G. Ivanov

    IPC分类号： G11C700

    CPC分类号： G11C17/16 ,  G11C11/5692 ,  G11C17/165

    摘要： A resistor fuse for use in a semiconductor device having an operating voltage. In one embodiment, the resistor fuse includes a silicon layer located over a semiconductor wafer and a metal silicide layer located over the silicon layer. The resistor fuse has a predetermined current threshold and is configured to open if a current through the resistor fuse at the operating voltage exceeds the current threshold.

    摘要翻译： 一种用于具有工作电压的半导体器件中的电阻器熔丝。 在一个实施例中，电阻器熔丝包括位于半导体晶片之上的硅层和位于硅层之上的金属硅化物层。 电阻器熔丝具有预定的电流阈值，并且如果在工作电压下通过电阻器熔丝的电流超过电流阈值，则该电阻熔断器被配置为打开。

    Inline ground-signal-ground (GSG) RF tester
    3.
    发明授权
    Inline ground-signal-ground (GSG) RF tester 失效
    在线地面信号地面（GSG）射频测试仪

    公开(公告)号：US06194739B1

    公开(公告)日：2001-02-27

    申请号：US09448521

    申请日：1999-11-23

    申请人： Tony G. Ivanov ,  Michael Scott Carroll

    发明人： Tony G. Ivanov ,  Michael Scott Carroll

    IPC分类号： H01L2358

    CPC分类号： H01L22/34 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    摘要： A wafer configured for in-process testing of electrical components has a plurality of dies disposed on the wafer, wherein adjacent dies are separated from one another by streets. An in-line device monitor having a first port, a second port, and a device-under-test substantially in line with one another is placed within a street, where the device-under-test is between the first and second ports and is electrically coupled to the first and second ports. With such an arrangement, streets having a width of 100 microns and less are suitable for accomodating a RF-device monitor having ground-signal or ground-signal-ground configurations. As a result, accurate GS or GSG RF-device monitors can be provided in narrow streets of wafers, thereby increasing the amount of wafer area available for circuitry.

    摘要翻译： 配置用于电气部件的在线测试的晶片具有设置在晶片上的多个管芯，其中相邻的管芯通过街道彼此分开。 具有第一端口，第二端口和基本上彼此匹配的被测器件的在线设备监视器被放置在街道内，其中被测器件在第一和第二端口之间，并且是 电耦合到第一和第二端口。 通过这样的布置，具有100微米或更小的宽度的街道适合于容纳具有接地信号或地面信号 - 地面配置的RF设备监视器。 因此，可以在晶圆的狭窄街道中提供准确的GS或GSG RF器件监视器，从而增加可用于电路的晶片面积的数量。

    Method and structure for DC and RF shielding of integrated circuits
    4.
    发明授权
    Method and structure for DC and RF shielding of integrated circuits 有权
    集成电路直流和射频屏蔽的方法和结构

    公开(公告)号：US06844236B2

    公开(公告)日：2005-01-18

    申请号：US09911364

    申请日：2001-07-23

    申请人： Tony G. Ivanov ,  Michael S. Carroll ,  Ranbir Singh

    发明人： Tony G. Ivanov ,  Michael S. Carroll ,  Ranbir Singh

    IPC分类号： H01L21/76 ,  H01L21/02 ,  H01L21/762 ,  H01L21/822 ,  H01L23/528 ,  H01L23/552 ,  H01L23/66 ,  H01L27/04 ,  H01L27/12

    CPC分类号： H01L21/76251 ,  H01L23/5283 ,  H01L23/552 ,  H01L23/66 ,  H01L2223/6622 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method for electromagnetically shielding circuits which combine to form an integrated circuit device provides isolated silicon islands surrounded laterally and subjacently by conductive material. The isolated silicon islands may be covered individually or as a group by a conductive cover. The integrated circuit may include at least one silicon island including an analog circuit and at least one silicon island including a digital circuit, the analog and digital circuits electromagnetically shielded from one another. The method for forming the structure includes providing a first semiconductor substrate and hydrophilically bonding a substructure to the first semiconductor substrate. The substructure includes the isolated silicon islands surrounded by the conductive material. The substructure may be formed on a second semiconductor substrate by implanting an impurity region into an upper portion of the second semiconductor substrate. After bonding, the substructure may be separated from the remainder of the second substrate by propagating a crack along the boundary of the impurity region which separates the substructure from the remainder of the second semiconductor substrate. The method further includes forming the conductive cover over the isolated silicon island or islands by forming insulating layers over the silicon islands then forming a conductive cover layer and conductive sidewalls to surround the silicon island or islands being enclosed.

    摘要翻译： 组合形成集成电路器件的电磁屏蔽电路的方法提供了隔离的硅岛，其横向地和由传导材料邻接地包围。 孤立的硅岛可以单独地覆盖或通过导电覆盖物覆盖。 集成电路可以包括至少一个包括模拟电路的硅岛和包括数字电路的至少一个硅岛，模拟和数字电路彼此电磁屏蔽。 形成该结构的方法包括提供第一半导体衬底并将子结构亲水地结合到第一半导体衬底。 该子结构包括由导电材料包围的隔离的硅岛。 可以通过将杂质区注入到第二半导体衬底的上部中而在第二半导体衬底上形成子结构。 在结合之后，通过沿着将子结构与第二半导体衬底的其余部分分离的杂质区域的边界传播裂纹，子结构可以与第二衬底的其余部分分离。 该方法还包括通过在硅岛上方形成绝缘层，形成导电覆盖层和导电侧壁以围绕被隔离的硅岛或岛状物，在隔离的硅岛或岛上形成导电盖。