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公开(公告)号：US07889911B2
公开(公告)日：2011-02-15
申请号：US12170532
申请日：2008-07-10
申请人： Michio Nakano , Shigeya Tanaka , Yoshiyuki Momiyama , Takashi Hiroi , Kazuya Hayashi , Dai Fujii , Takako Fujisawa , Atsushi Ichige , Ichiro Kawashima
发明人： Michio Nakano , Shigeya Tanaka , Yoshiyuki Momiyama , Takashi Hiroi , Kazuya Hayashi , Dai Fujii , Takako Fujisawa , Atsushi Ichige , Ichiro Kawashima
IPC分类号： G06K9/00
CPC分类号： G06T7/001 , G06T2200/28 , G06T2207/30148
摘要： An image processing apparatus for wafer inspection tool that is able to perform continuously cell to cell comparison inspection, die to die comparison inspection, and cell-to-cell and die-to-die hybrid comparison inspection, employing a plurality of processors. This image processing apparatus for wafer inspection tool comprises a plurality of processors for performing parallel processing, means for cutting out image data including a forward end overlap and a rear end overlap at partition boundaries in order to cut serial data into a predetermined image size, means for distributing the cutout image data to the plurality of processors, and means for assembling results of processing performed by the plurality of processors. The forward end overlap is set greater than a pitch of the cell subject to cell to cell comparison inspection.
摘要翻译： 一种用于晶片检查工具的图像处理装置，其能够执行连续的单元到单元比较检查，管芯到管芯比较检查，以及使用多个处理器的单元到单元和管芯到管芯之间的混合比较检查。 这种晶片检查工具的图像处理装置包括用于执行并行处理的多个处理器，用于在分区边界处切出包括前端重叠和后端重叠的图像数据的装置，以便将串行数据切割成预定图像尺寸 用于将剪切图像数据分配给多个处理器，以及用于组装由多个处理器执行的处理结果的装置。 前端重叠被设定为大于细胞对细胞比较检查的细胞的间距。
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公开(公告)号：US07421110B2
公开(公告)日：2008-09-02
申请号：US10780752
申请日：2004-02-19
申请人： Michio Nakano , Shigeya Tanaka , Yoshiyuki Momiyama , Takashi Hiroi , Kazuya Hayashi , Dai Fujii , Takako Fujisawa , Atsushi Ichige , Ichiro Kawashima
发明人： Michio Nakano , Shigeya Tanaka , Yoshiyuki Momiyama , Takashi Hiroi , Kazuya Hayashi , Dai Fujii , Takako Fujisawa , Atsushi Ichige , Ichiro Kawashima
IPC分类号： G06K9/00
CPC分类号： G06T7/001 , G06T2200/28 , G06T2207/30148
摘要： An image processing apparatus for wafer inspection tool that is able to perform continuously cell to cell comparison inspection, die to die comparison inspection, and cell-to-cell and die-to-die hybrid comparison inspection, employing a plurality of processors. This image processing apparatus for wafer inspection tool comprises a plurality of processors for performing parallel processing, means for cutting out image data including a forward end overlap and a rear end overlap at partition boundaries in order to cut serial data into a predetermined image size, means for distributing the cutout image data to the plurality of processors, and means for assembling results of processing performed by the plurality of processors. The forward end overlap is set greater than a pitch of the cell subject to cell to cell comparison inspection.
摘要翻译： 一种用于晶片检查工具的图像处理装置，其能够执行连续的单元到单元比较检查，管芯到管芯比较检查，以及使用多个处理器的单元到单元和管芯到管芯的混合比较检查。 这种晶片检查工具的图像处理装置包括用于执行并行处理的多个处理器，用于在分区边界处切出包括前端重叠和后端重叠的图像数据的装置，以便将串行数据切割成预定图像尺寸 用于将剪切图像数据分配给多个处理器，以及用于组装由多个处理器执行的处理结果的装置。 前端重叠被设定为大于细胞对细胞比较检查的细胞的间距。
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公开(公告)号：US20080285841A1
公开(公告)日：2008-11-20
申请号：US12170532
申请日：2008-07-10
申请人： Michio NAKANO , Shigeya Tanaka , Yoshiyuki Momiyama , Takashi Hiroi , Kazuya Hayashi , Dai Fujii , Takako Fujisawa , Atsushi Ichige , Ichiro Kawashima
发明人： Michio NAKANO , Shigeya Tanaka , Yoshiyuki Momiyama , Takashi Hiroi , Kazuya Hayashi , Dai Fujii , Takako Fujisawa , Atsushi Ichige , Ichiro Kawashima
IPC分类号： G06K9/46
CPC分类号： G06T7/001 , G06T2200/28 , G06T2207/30148
摘要： An image processing apparatus for wafer inspection tool that is able to perform continuously cell to cell comparison inspection, die to die comparison inspection, and cell-to-cell and die-to-die hybrid comparison inspection, employing a plurality of processors. This image processing apparatus for wafer inspection tool comprises a plurality of processors for performing parallel processing, means for cutting out image data including a forward end overlap and a rear end overlap at partition boundaries in order to cut serial data into a predetermined image size, means for distributing the cutout image data to the plurality of processors, and means for assembling results of processing performed by the plurality of processors. The forward end overlap is set greater than a pitch of the cell subject to cell to cell comparison inspection.
摘要翻译： 一种用于晶片检查工具的图像处理装置，其能够执行连续的单元到单元比较检查，管芯到管芯比较检查，以及使用多个处理器的单元到单元和管芯到管芯之间的混合比较检查。 这种晶片检查工具的图像处理装置包括用于执行并行处理的多个处理器，用于在分区边界处切出包括前端重叠和后端重叠的图像数据的装置，以便将串行数据切割成预定图像尺寸 用于将剪切图像数据分配给多个处理器，以及用于组装由多个处理器执行的处理结果的装置。 前端重叠被设定为大于细胞对细胞比较检查的细胞的间距。
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公开(公告)号：US08036447B2
公开(公告)日：2011-10-11
申请号：US12564567
申请日：2009-09-22
申请人： Koichi Hayakawa , Hiroshi Miyai , Masaaki Nojiri , Michio Nakano , Takako Fujisawa , Dai Fujii
发明人： Koichi Hayakawa , Hiroshi Miyai , Masaaki Nojiri , Michio Nakano , Takako Fujisawa , Dai Fujii
IPC分类号： G06K9/00
CPC分类号： G06T7/001 , G06T2207/30148
摘要： A pattern inspection apparatus has a setting unit of a plurality of cell areas A and B of different cell comparison pitches and inspects the plurality of cell areas of the different cell comparison pitches in accordance with settings of the setting unit. As information to read out image data for an inspection image and a reference image from an image memory, in addition to position information of a defective image, identification information showing either a cell comparison or a die comparison and relative position information of the reference image can be set. The apparatus also has a unit for setting a plurality of inspection threshold values every inspection area and inspects a plurality of inspection areas by the plurality of inspection threshold values.
摘要翻译： 图案检查装置具有不同的单元比较间距的多个单元区域A和B的设置单元，并且根据设置单元的设置来检查不同单元比较间距的多个单元区域。 作为用于从图像存储器读出检查图像和参考图像的图像数据的信息，除了缺陷图像的位置信息之外，还可以显示小区比较或者模具比较的标识信息以及参考图像的相对位置信息 被设置。 该设备还具有用于在每个检查区域设置多个检查阈值的单元，并且通过多个检查阈值检查多个检查区域。
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公开(公告)号：US20060171593A1
公开(公告)日：2006-08-03
申请号：US11344101
申请日：2006-02-01
申请人： Koichi Hayakawa , Hiroshi Miyai , Masaaki Nojiri , Michio Nakano , Takako Fujisawa , Dai Fujii
发明人： Koichi Hayakawa , Hiroshi Miyai , Masaaki Nojiri , Michio Nakano , Takako Fujisawa , Dai Fujii
CPC分类号： G06T7/001 , G06T2207/30148
摘要： A pattern inspection apparatus has a setting unit of a plurality of cell areas A and B of different cell comparison pitches and inspects the plurality of cell areas of the different cell comparison pitches in accordance with settings of the setting unit. As information to read out image data for an inspection image and a reference image from an image memory, in addition to position information of a defective image, identification information showing either a cell comparison or a die comparison and relative position information of the reference image can be set. The apparatus also has a unit for setting a plurality of inspection threshold values every inspection area and inspects a plurality of inspection areas by the plurality of inspection threshold values.
摘要翻译： 图案检查装置具有不同的单元比较间距的多个单元区域A和B的设置单元，并且根据设置单元的设置检查不同单元比较间距的多个单元区域。 作为用于从图像存储器读出检查图像和参考图像的图像数据的信息，除了缺陷图像的位置信息之外，还可以显示小区比较或者模具比较的标识信息以及参考图像的相对位置信息 被设置。 该设备还具有用于在每个检查区域设置多个检查阈值的单元，并且通过多个检查阈值检查多个检查区域。
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公开(公告)号：US20100008564A1
公开(公告)日：2010-01-14
申请号：US12564567
申请日：2009-09-22
申请人： Koichi HAYAKAWA , Hiroshi Miyai , Masaaki Nojiri , Michio Nakano , Takako Fujisawa , Dai Fujii
发明人： Koichi HAYAKAWA , Hiroshi Miyai , Masaaki Nojiri , Michio Nakano , Takako Fujisawa , Dai Fujii
IPC分类号： G06K9/00
CPC分类号： G06T7/001 , G06T2207/30148
摘要： A pattern inspection apparatus has a setting unit of a plurality of cell areas A and B of different cell comparison pitches and inspects the plurality of cell areas of the different cell comparison pitches in accordance with settings of the setting unit. As information to read out image data for an inspection image and a reference image from an image memory, in addition to position information of a defective image, identification information showing either a cell comparison or a die comparison and relative position information of the reference image can be set. The apparatus also has a unit for setting a plurality of inspection threshold values every inspection area and inspects a plurality of inspection areas by the plurality of inspection threshold values.
摘要翻译： 图案检查装置具有不同的单元比较间距的多个单元区域A和B的设置单元，并且根据设置单元的设置检查不同单元比较间距的多个单元区域。 作为用于从图像存储器读出检查图像和参考图像的图像数据的信息，除了缺陷图像的位置信息之外，还可以显示小区比较或者模具比较的标识信息以及参考图像的相对位置信息 被设置。 该设备还具有用于在每个检查区域设置多个检查阈值的单元，并且通过多个检查阈值检查多个检查区域。
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公开(公告)号：US06986029B2
公开(公告)日：2006-01-10
申请号：US10201249
申请日：2002-07-24
申请人： Hiromichi Yamada , Dai Fujii , Yasuhiro Nakatsuka , Takashi Hotta , Kotaro Shimamura , Tatsuki Inuduka , Takanaga Yamazaki
发明人： Hiromichi Yamada , Dai Fujii , Yasuhiro Nakatsuka , Takashi Hotta , Kotaro Shimamura , Tatsuki Inuduka , Takanaga Yamazaki
CPC分类号： G06F9/30178 , Y10S707/99942
摘要： A micro-controller includes a dictionary memory for storing instruction codes which appear in a program, and a compressed code memory for storing compressed codes each converted from each of the instruction codes included in the program. Each compressed code has a word length sufficiently long to identify all instruction codes included in the program. Each compressed code has a value indicative of an address in the dictionary memory at which an associated instruction code is stored. The micro-controller is responsive to an instruction code read request which specifies an address of a compressed code to read the compressed code stored in the specified address in the compressed code memory, and to subsequently read an instruction code stored in an address indicated by the compressed code in the dictionary memory.
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8.发明申请Micro-controller for reading out compressed instruction code and program memory for compressing instruction code and storing therein 审中-公开用于读出压缩指令代码的微控制器和用于压缩指令代码并存储在其中的程序存储器公开(公告)号：US20050198471A1
公开(公告)日：2005-09-08
申请号：US11117509
申请日：2005-04-29
申请人： Hiromichi Yamada , Dai Fujii , Yasuhiro Nakatsuka , Takashi Hotta , Kotaro Shimamura , Tatsuki Inuduka , Takanaga Yamazaki
发明人： Hiromichi Yamada , Dai Fujii , Yasuhiro Nakatsuka , Takashi Hotta , Kotaro Shimamura , Tatsuki Inuduka , Takanaga Yamazaki
CPC分类号： G06F9/30178 , Y10S707/99942
摘要： A micro-controller includes a dictionary memory for storing instruction codes which appear in a program, and a compressed code memory for storing compressed codes each converted from each of the instruction codes included in the program. Each compressed code has a word length sufficiently long to identify all instruction codes included in the program. Each compressed code has a value indicative of an address in the dictionary memory at which an associated instruction code is stored. The micro-controller is responsive to an instruction code read request which specifies an address of a compressed code to read the compressed code stored in the specified address in the compressed code memory, and to subsequently read an instruction code stored in an address indicated by the compressed code in the dictionary memory.
摘要翻译： 微控制器包括用于存储出现在程序中的指令代码的字典存储器和用于存储从程序中包括的每个指令代码转换的压缩代码的压缩代码存储器。 每个压缩代码的字长足够长以识别程序中包含的所有指令代码。 每个压缩代码具有指示存储相关联的指令代码的字典存储器中的地址的值。 微控制器响应于指定代码读取请求，其指定压缩代码的地址以读取存储在压缩代码存储器中的指定地址中的压缩代码，并且随后读取存储在由压缩代码存储器指示的地址中的指令代码 字典内存中的压缩代码。
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公开(公告)号：US06996130B2
公开(公告)日：2006-02-07
申请号：US10158007
申请日：2002-05-31
申请人： Masahiro Ohashi , Takeiki Aizono , Dai Fujii , Hiroyuki Tanaka , Makoto Kogure
发明人： Masahiro Ohashi , Takeiki Aizono , Dai Fujii , Hiroyuki Tanaka , Makoto Kogure
IPC分类号： H04J1/02
CPC分类号： H04L29/06 , C04B2237/366 , H04L67/12
摘要： In a distributed control system in which a plurality of nodes are connected to a transmission line, each node controlling components connected to this node and transmitting a message to other nodes, a message sent by each node includes at least two message-sending condition-identifying portions, one of the condition-identifying portions including data indicating a message-receiving node or non-designation of a message-receiving node; and a comparison-selection circuit provided in each node includes registration parts for registering data of message-receiving conditions, at least two registration parts for comparing contents of the condition-identifying portion in the taken-in message with the data of message-receiving conditions registered in the registration parts, a received-message storing part for storing a message to be received in this node, a control part for determining whether or not the taken-in message is to be received in this node based on a result of comparison-processing performed in the comparison and selection means and for transferring the taken-in message to the received-message storing part if it is determined that the taken-in message is received in this node, otherwise, abandoning the taken-in message.
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公开(公告)号：US06609232B2
公开(公告)日：2003-08-19
申请号：US09791818
申请日：2001-02-26
申请人： Teppei Hirotsu , Ryo Fujita , Kotaro Shimamura , Hiromichi Yamada , Dai Fujii , Haruyuki Nakayama
发明人： Teppei Hirotsu , Ryo Fujita , Kotaro Shimamura , Hiromichi Yamada , Dai Fujii , Haruyuki Nakayama
IPC分类号： G06F945
CPC分类号： G06F17/505
摘要： In logical compound of inter-subblock paths, circuits including all inter-subblock paths are generated. Logical compound is conducted for the generated circuits to achieve logical compound of the inter-subblock paths. By treating inter-subblock paths as intra-subblock paths, no input/output delay restriction is required for the logical compound of inter-subblock paths. This makes it possible to fully use performance of the logical compound tool, and hence the inter-subblock paths can be optimized through one operation of the processing.
摘要翻译： 在子块间路径的逻辑复合中，生成包括所有子块间路径的电路。 对所生成的电路进行逻辑复合以实现子块间路径的逻辑复合。 通过将子块间路径视为子块内路径，对于子块间路径的逻辑组合不需要输入/输出延迟限制。 这使得可以充分利用逻辑复合工具的性能，因此可以通过处理的一个操作来优化子块间路径。
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