DEFECT INSPECTION METHOD, AND DEVICE THEREOF
    1.
    发明申请
    DEFECT INSPECTION METHOD, AND DEVICE THEREOF 有权
    缺陷检查方法及其设备

    公开(公告)号:US20130119250A1

    公开(公告)日:2013-05-16

    申请号:US13697025

    申请日:2011-04-05

    IPC分类号: H01J37/28 H01J37/22

    摘要: A conventional pattern inspection, which compares an image to be inspected with a reference image and subjects the resulting difference value to the defect detection using the threshold of defect determination, has difficulty in highly-sensitive inspection. Because defects occur only in specific circuit pattern sections, false reports occur in the conventional pattern inspections which are not based on the position. Disclosed are a defect inspection method and a device thereof which perform a pattern inspection by acquiring a GP image in advance, designating a place to be inspected and a threshold map to the GP image on the GUI, setting the identification reference of the defects, next acquiring the image to be inspected, applying the identification reference to the image to be inspected, and identifying the defects with the identification reference, thereby enabling the highly-sensitive inspection.

    摘要翻译: 将待检查的图像与参考图像进行比较并将得到的差分值与使用缺陷确定的阈值进行缺陷检测相对照的常规图案检查在高灵敏度检查中是困难的。 因为缺陷仅在特定的电路图形部分中发生,所以在常规图案检查中出现虚假报告,而不是基于位置。 公开了一种缺陷检查方法及其装置,其通过事先获取GP图像,指定待检查地点和GUI上的GP图像的阈值图来进行图案检查,设置缺陷的识别参考,下一步 获取要检查的图像,将所述识别参考应用于要检查的图像,以及使用所述识别参考来识别所述缺陷,由此实现高度敏感的检查。

    Circuit-Pattern Inspection Device
    2.
    发明申请
    Circuit-Pattern Inspection Device 有权
    电路图形检测装置

    公开(公告)号:US20120305768A1

    公开(公告)日:2012-12-06

    申请号:US13577719

    申请日:2011-02-21

    IPC分类号: G01N23/225

    摘要: Provided is a circuit-pattern inspection device which enables efficient inspection of a semiconductor wafer by selectively inspecting areas on the semiconductor wafer, such as boundaries between patterns thereon, where defects are likely to occur during the step of producing the semiconductor wafer while changing the beam scanning direction for each area. Two-dimensional beam-deflection control is employed for inspection operations in a continuous-stage-movement-type circuit-pattern inspection device in which only one-dimensional scanning has been employed conventionally. That is, by employing a combination of an electron-beam-deflection control in a first direction parallel to the stage-movement direction and an electron-beam-deflection control in a second direction intersecting the stage-movement direction, it is possible to obtain an image of any desired area for inspection that is set within a swath. The amplitude of deflection signals for the electron-beam-deflection and the rise and fall timings of the signals are suitably controlled according to inspection conditions.

    摘要翻译: 提供一种电路图案检查装置,其能够通过选择性地检查半导体晶片上的区域,例如在其上的图案之间的边界上的区域,从而有效地检查半导体晶片,其中在制造半导体晶片的步骤期间可能会发生缺陷,同时改变光束 每个区域的扫描方向。 在通常仅采用一维扫描的连续级移动型电路图案检查装置中,进行二维光束偏转控制。 也就是说,通过在平行于载物台移动方向的第一方向上的电子束偏转控制和与载物台移动方向相交的第二方向上的电子束偏转控制的组合,可以获得 任何所需的检查区域的图像,其设置在条纹内。 根据检查条件适当地控制电子束偏转的偏转信号的幅度和信号的上升和下降定时。

    Image processing unit for wafer inspection tool
    3.
    发明授权
    Image processing unit for wafer inspection tool 有权
    晶圆检测工具图像处理单元

    公开(公告)号:US07889911B2

    公开(公告)日:2011-02-15

    申请号:US12170532

    申请日:2008-07-10

    IPC分类号: G06K9/00

    摘要: An image processing apparatus for wafer inspection tool that is able to perform continuously cell to cell comparison inspection, die to die comparison inspection, and cell-to-cell and die-to-die hybrid comparison inspection, employing a plurality of processors. This image processing apparatus for wafer inspection tool comprises a plurality of processors for performing parallel processing, means for cutting out image data including a forward end overlap and a rear end overlap at partition boundaries in order to cut serial data into a predetermined image size, means for distributing the cutout image data to the plurality of processors, and means for assembling results of processing performed by the plurality of processors. The forward end overlap is set greater than a pitch of the cell subject to cell to cell comparison inspection.

    摘要翻译: 一种用于晶片检查工具的图像处理装置,其能够执行连续的单元到单元比较检查,管芯到管芯比较检查,以及使用多个处理器的单元到单元和管芯到管芯之间的混合比较检查。 这种晶片检查工具的图像处理装置包括用于执行并行处理的多个处理器,用于在分区边界处切出包括前端重叠和后端重叠的图像数据的装置,以便将串行数据切割成预定图像尺寸 用于将剪切图像数据分配给多个处理器,以及用于组装由多个处理器执行的处理结果的装置。 前端重叠被设定为大于细胞对细胞比较检查的细胞的间距。

    Semiconductor wafer inspection tool and semiconductor wafer inspection method
    5.
    发明授权
    Semiconductor wafer inspection tool and semiconductor wafer inspection method 失效
    半导体晶圆检查工具和半导体晶圆检查方法

    公开(公告)号:US07728294B2

    公开(公告)日:2010-06-01

    申请号:US11808247

    申请日:2007-06-07

    IPC分类号: H01J37/21 H01J37/26

    摘要: A semiconductor wafer inspection tool and a semiconductor wafer inspection method capable of conducting an inspection under appropriate conditions in any one of an NVC (Negative Voltage Contrast) mode and a PVC (Positive Voltage Contrast) mode is provided. Primary electrons 2 are irradiated onto a wafer to be inspected 6 and the irradiation position thereof is scanned in an XY direction. Secondary electrons (or reflected electrons) 10 from the wafer to be inspected 6 are controlled by a charge control electrode 5 and detected by a sensor 11. An image processor converts a detection signal from the sensor 11 to a detected image, compares the detected image with a predetermined reference image, judges defects, an overall control section 14 selects inspection conditions from recipe information for each wafer to be inspected 6 and sets a voltage to be applied to the charge control electrode 5. A Z stage 8 sets the distance between the wafer to be inspected 6 and the charge control electrode 5 according to this voltage.

    摘要翻译: 提供能够在适当条件下进行NVC(负电压对比度)模式和PVC(正电压对比度)模式中的任一种的半导体晶片检查工具和半导体晶片检查方法。 将一次电子2照射到要检查的晶片6上,并且其XY照射位置被扫描。 来自待检查晶片的二次电子(或反射电子)10由充电控制电极5控制并由传感器11检测。图像处理器将来自传感器11的检测信号转换为检测图像, 通过预定的参考图像判断缺陷,总体控制部分14从每个要检查的晶片的配方信息中选择检查条件6并设置要施加到充电控制电极5的电压.Za级8设置晶片之间的距离 根据该电压检查6和充电控制电极5。

    Method and apparatus for inspecting pattern defects and mirror electron projection type or multi-beam scanning type electron beam apparatus
    6.
    发明授权
    Method and apparatus for inspecting pattern defects and mirror electron projection type or multi-beam scanning type electron beam apparatus 有权
    用于检查图案缺陷和镜电子投影型或多光束扫描型电子束装置的方法和装置

    公开(公告)号:US07521676B2

    公开(公告)日:2009-04-21

    申请号:US11601723

    申请日:2006-11-20

    IPC分类号: G01N23/225

    摘要: The present invention provides a mirror electron projection (MPJ) type (SEPJ type included) scanning electron beam apparatus that is capable of performing condition setup, and a method and apparatus for inspecting pattern defects with the scanning electron beam apparatus. A mirror electron projection type defect inspection apparatus, which comprises a charging device for emitting a charging electron beam, electron beam irradiation means for shedding a mirror electron projection electron beam onto an inspection region near which an electrical potential distribution is formed, detection means for detecting secondary electrons or reflected electrons generated from a surface and proximity of the specimen, and defect detection means for detecting a defect by processing a mirror image signal that is detected by the detection means, includes irradiation condition optimization means for optimizing charging electron beam irradiation conditions.

    摘要翻译: 本发明提供一种能够进行条件建立的镜电子投射(MPJ)型(包括SEPJ型)扫描电子束装置,以及用扫描电子束装置检查图案缺陷的方法和装置。 镜电子投影型缺陷检查装置,其包括用于发射充电电子束的充电装置,用于将镜电子投影电子束切除到形成有电位分布的检查区域的电子束照射装置,用于检测 从检体的表面和邻近产生的二次电子或反射电子,以及用于通过处理由检测装置检测出的镜像信号来检测缺陷的缺陷检测装置,包括用于优化充电电子束照射条件的照射条件优化装置。

    Circuit-pattern inspection apparatus
    9.
    发明申请
    Circuit-pattern inspection apparatus 失效
    电路图形检查装置

    公开(公告)号:US20050043903A1

    公开(公告)日:2005-02-24

    申请号:US10896895

    申请日:2004-07-23

    摘要: The disclosed subject matter is related to a circuit pattern inspection apparatus for detecting a gradual changing of defect expanding over a large area of the semiconductor wafer. In order to detect a gradual changing of a defect related condition expanding over a large area of the semiconductor wafer, comparison is made between dies on a wafer that are separated from each other by a distance of at least one die width. For example, when a value according to a difference between such dies exceeds a pre-determined value, an existence of the gradual changing can be confirmed.

    摘要翻译: 所公开的主题涉及用于检测半导体晶片的大面积上的缺陷扩展的逐渐变化的电路图案检查装置。 为了检测在半导体晶片的大面积上扩展的缺陷相关状态的逐渐变化,在晶片上相互间隔至少一个管芯宽度的距离的晶片之间进行比较。 例如,当根据这种模具之间的差异的值超过预定值时,可以确认逐渐变化的存在。