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公开(公告)号:US20210202299A1
公开(公告)日:2021-07-01
申请号:US16780594
申请日:2020-02-03
Applicant: Micron Technology, Inc.
Inventor: Jukuan Zheng , Sri Sai Sivakumar Vegunta , Kevin L. Baker , Josiah Jebaraj Johnley Muthuraj , Efe S. Ege
IPC: H01L21/768 , H01L27/24 , H01L27/108 , H01L45/00 , H01L21/67
Abstract: Methods of manufacturing memory devices having memory cells and corresponding selectors, and associated systems and devices, are disclosed herein. In one embodiment, a method of manufacturing a memory device includes (a) removing a protection layer formed over the memory cells and (b) forming a cap layer over the memory cells before forming a conductive via through the memory device. The cap layer is configured to protect the memory cells during operation and can comprise a resistive material. The protection layer can be more efficiently removed with improved process margin and less device health impact using a polishing process before the conductive via is formed, thus increasing the manufacturing margin of the memory device.
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公开(公告)号:US20220068702A1
公开(公告)日:2022-03-03
申请号:US17524638
申请日:2021-11-11
Applicant: Micron Technology, Inc.
Inventor: Jukuan Zheng , Sri Sai Sivakumar Vegunta , Kevin L. Baker , Josiah Jebaraj Johnley Muthuraj , Efe S. Ege
IPC: H01L21/768 , H01L27/24 , H01L27/108 , H01L21/67 , H01L45/00 , G11C5/06
Abstract: Methods of manufacturing memory devices having memory cells and corresponding selectors, and associated systems and devices, are disclosed herein. In one embodiment, a method of manufacturing a memory device includes (a) removing a protection layer formed over the memory cells and (b) forming a cap layer over the memory cells before forming a conductive via through the memory device. The cap layer is configured to protect the memory cells during operation and can comprise a resistive material. The protection layer can be more efficiently removed with improved process margin and less device health impact using a polishing process before the conductive via is formed, thus increasing the manufacturing margin of the memory device.
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公开(公告)号:US20240349478A1
公开(公告)日:2024-10-17
申请号:US18619000
申请日:2024-03-27
Applicant: Micron Technology, Inc.
Inventor: Fatma Arzum Simsek-Ege , Scott L. Light , Efe S. Ege , Chunhua Yao
IPC: H10B12/00
CPC classification number: H10B12/0335 , H10B12/315 , H10B12/482 , H10B12/485
Abstract: A method of forming a microelectronic device includes forming a first dielectric stack over a semiconductor base structure including pillar structures separated by filled isolation trenches. Digit line contacts are formed to partially vertically extend through the first dielectric stack and into digit line contact regions of the pillar structures. Digit lines are formed over and in contact with the digit line contacts, and partially vertically extend through the first dielectric stack. A second dielectric stack is formed over the digit lines and the first dielectric stack. Storage node contacts are formed to vertically extend partially through the second dielectric stack, completely through the first dielectric stack, and into storage node contact regions of the pillar structures. Redistribution layer structures are formed over and in contact with the storage node contacts, and partially vertically extend through the second dielectric stack. Microelectronic devices, memory devices, and electronic systems are also described.
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公开(公告)号:US11735473B2
公开(公告)日:2023-08-22
申请号:US17524638
申请日:2021-11-11
Applicant: Micron Technology, Inc.
Inventor: Jukuan Zheng , Sri Sai Sivakumar Vegunta , Kevin L. Baker , Josiah Jebaraj Johnley Muthuraj , Efe S. Ege
CPC classification number: H01L21/7684 , G11C5/06 , H01L21/67075 , H10B12/09 , H10B63/00 , H10N70/801 , H10N70/882 , H10N70/883
Abstract: Methods of manufacturing memory devices having memory cells and corresponding selectors, and associated systems and devices, are disclosed herein. In one embodiment, a method of manufacturing a memory device includes (a) removing a protection layer formed over the memory cells and (b) forming a cap layer over the memory cells before forming a conductive via through the memory device. The cap layer is configured to protect the memory cells during operation and can comprise a resistive material. The protection layer can be more efficiently removed with improved process margin and less device health impact using a polishing process before the conductive via is formed, thus increasing the manufacturing margin of the memory device.
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公开(公告)号:US11201083B2
公开(公告)日:2021-12-14
申请号:US16780594
申请日:2020-02-03
Applicant: Micron Technology, Inc.
Inventor: Jukuan Zheng , Sri Sai Sivakumar Vegunta , Kevin L. Baker , Josiah Jebaraj Johnley Muthuraj , Efe S. Ege
IPC: H01L21/768 , H01L27/24 , H01L27/108 , H01L21/67 , H01L45/00 , G11C5/06
Abstract: Methods of manufacturing memory devices having memory cells and corresponding selectors, and associated systems and devices, are disclosed herein. In one embodiment, a method of manufacturing a memory device includes (a) removing a protection layer formed over the memory cells and (b) forming a cap layer over the memory cells before forming a conductive via through the memory device. The cap layer is configured to protect the memory cells during operation and can comprise a resistive material. The protection layer can be more efficiently removed with improved process margin and less device health impact using a polishing process before the conductive via is formed, thus increasing the manufacturing margin of the memory device.
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