-
公开(公告)号：US20250014665A1
公开(公告)日：2025-01-09
申请号：US18759105
申请日：2024-06-28
Applicant: Micron Technology, Inc.
Inventor： Ivo Thomas Wambeke , James Eric Davis , Joshua Daniel Tomayer , Fulvio Rori , Chiara Cerafogli , Kenneth William Marr
Abstract: A memory device can include a first portion having a memory array comprising a plurality of memory cells and a first via chain segment for performing a test operation. The memory device can include a second portion comprising processing circuitry and a second via chain segment for performing the test operation. The memory device can also include an interconnect coupling the first portion and the second portion, the interconnect comprising a third via chain segment, wherein the first via chain segment, second via chain segment, and third via chain segment can be selected independently.
-
公开(公告)号：US11189536B2
公开(公告)日：2021-11-30
申请号：US16294469
申请日：2019-03-06
Applicant: Micron Technology, Inc.
Inventor： Kenneth William Marr , Chiara Cerafogli , Michele Piccardi , Marco-Domenico Tiburzi , Eric Higgins Freeman , Joshua Daniel Tomayer
Abstract: A microelectronic chip device includes a semiconductor substrate and multiple on-chip strain sensors (OCSSs) constructed on the substrate at various locations of the substrate. The OCSSs may each include multiple piezoresistive devices configured to sense a strain at a location of the various locations and produce a strain signal representing the strain at that location. A strain measurement circuit may also be constructed on the semiconductor substrate and configured to measure strain parameters from the strain signals produced by the OCSSs. The strain parameters represent the strains at the various location. Values of the strain parameters can be used for analysis of mechanical stress on the chip device.
-
公开(公告)号：US20210043525A1
公开(公告)日：2021-02-11
申请号：US16535882
申请日：2019-08-08
Applicant: Micron Technology, Inc.
Inventor： Chiara Cerafogli , Kenneth William Marr , Brian J. Soderling , Michael P. Violette , Joshua Daniel Tomayer , James E. Davis
IPC: H01L21/66 , H01L27/11556 , H01L23/00 , H01L23/528 , H01L27/11526 , H01L27/11573 , H03K3/03 , H01L27/11582 , G11C16/26 , G11C16/08 , G11C16/04 , G11C29/14
Abstract: Some embodiments include apparatuses and methods of fabricating the apparatuses. One of the apparatuses includes a substrate of a semiconductor die; a memory cell portion located over a first portion of the substrate; a conductive pad portion located over a second portion of the substrate and outside the memory cell portion; and a sensor circuit including a portion located over the second portion of the substrate and under the conductive pad portion. The conductive pad portion includes conductive pads. Each of the conductive pads is part of a respective electrical path coupled to a conductive contact of a base outside the substrate.
-
Patent Agency Ranking
公开(公告)号：US20230005799A1
公开(公告)日：2023-01-05
申请号：US17892749
申请日：2022-08-22
Applicant: Micron Technology, Inc.
Inventor： Chiara Cerafogli , Kenneth William Marr , Brian J. Soderling , Michael P. Violette , Joshua Daniel Tomayer , James Eric Davis
IPC: H01L21/66 , H01L23/00 , H01L23/528 , H01L27/11526 , H01L27/11573 , H03K3/03 , H01L27/11582 , G11C16/26 , G11C16/08 , G11C16/04 , G11C29/14 , H01L27/11556
Abstract: Some embodiments include apparatuses and methods of fabricating the apparatuses. One of the apparatuses includes a substrate of a semiconductor die; a memory cell portion located over a first portion of the substrate; a conductive pad portion located over a second portion of the substrate and outside the memory cell portion; and a sensor circuit including a portion located over the second portion of the substrate and under the conductive pad portion. The conductive pad portion includes conductive pads. Each of the conductive pads is part of a respective electrical path coupled to a conductive contact of a base outside the substrate.
-
公开(公告)号：US20220084896A1
公开(公告)日：2022-03-17
申请号：US17534973
申请日：2021-11-24
Applicant: Micron Technology, Inc.
Inventor： Kenneth William Marr , Chiara Cerafogli , Michele Piccardi , Marco-Domenico Tiburzi , Eric Higgins Freeman , Joshua Daniel Tomayer
Abstract: A microelectronic chip device includes a semiconductor substrate and multiple on-chip strain sensors (OCSSs) constructed on the substrate at various locations of the substrate. The OCSSs may each include multiple piezoresistive devices configured to sense a strain at a location of the various locations and produce a strain signal representing the strain at that location. A strain measurement circuit may also be constructed on the semiconductor substrate and configured to measure strain parameters from the strain signals produced by the OCSSs. The strain parameters represent the strains at the various location. Values of the strain parameters can be used for analysis of mechanical stress on the chip device.
-
公开(公告)号：US11978680B2
公开(公告)日：2024-05-07
申请号：US17534973
申请日：2021-11-24
Applicant: Micron Technology, Inc.
Inventor： Kenneth William Marr , Chiara Cerafogli , Michele Piccardi , Marco-Domenico Tiburzi , Eric Higgins Freeman , Joshua Daniel Tomayer
Abstract: A microelectronic chip device includes a semiconductor substrate and multiple on-chip strain sensors (OCSSs) constructed on the substrate at various locations of the substrate. The OCSSs may each include multiple piezoresistive devices configured to sense a strain at a location of the various locations and produce a strain signal representing the strain at that location. A strain measurement circuit may also be constructed on the semiconductor substrate and configured to measure strain parameters from the strain signals produced by the OCSSs. The strain parameters represent the strains at the various location. Values of the strain parameters can be used for analysis of mechanical stress on the chip device.
-
公开(公告)号：US11424169B2
公开(公告)日：2022-08-23
申请号：US16535882
申请日：2019-08-08
Applicant: Micron Technology, Inc.
Inventor： Chiara Cerafogli , Kenneth William Marr , Brian J. Soderling , Michael P. Violette , Joshua Daniel Tomayer , James E. Davis
IPC: H01L23/528 , G11C16/26 , H01L21/66 , H01L23/00 , H01L27/11526 , H01L27/11573 , H03K3/03 , H01L27/11582 , G11C16/08 , G11C16/04 , G11C29/14 , H01L27/11556
Abstract: Some embodiments include apparatuses and methods of fabricating the apparatuses. One of the apparatuses includes a substrate of a semiconductor die; a memory cell portion located over a first portion of the substrate; a conductive pad portion located over a second portion of the substrate and outside the memory cell portion; and a sensor circuit including a portion located over the second portion of the substrate and under the conductive pad portion. The conductive pad portion includes conductive pads. Each of the conductive pads is part of a respective electrical path coupled to a conductive contact of a base outside the substrate.
-
公开(公告)号：US20200211914A1
公开(公告)日：2020-07-02
申请号：US16294469
申请日：2019-03-06
Applicant: Micron Technology, Inc.
Inventor： Kenneth William Marr , Chiara Cerafogli , Michele Piccardi , Marco-Domenico Tiburzi , Eric Higgins Freeman , Joshua Daniel Tomayer
Abstract: A microelectronic chip device includes a semiconductor substrate and multiple on-chip strain sensors (OCSS s) constructed on the substrate at various locations of the substrate. The OCSSs may each include multiple piezoresistive devices configured to sense a strain at a location of the various locations and produce a strain signal representing the strain at that location. A strain measurement circuit may also be constructed on the semiconductor substrate and configured to measure strain parameters from the strain signals produced by the OCSSs. The strain parameters represent the strains at the various location. Values of the strain parameters can be used for analysis of mechanical stress on the chip device.
-
-
-
-
-
-
-
Search Results
8
records
(took 0.013 seconds)
