Phase interpolator
    1.
    发明授权

    公开(公告)号:US10153775B1

    公开(公告)日:2018-12-11

    申请号:US15701689

    申请日:2017-09-12

    Abstract: Apparatuses and methods for phase interpolators are provided. An example apparatus comprises a phase interpolator and a controller coupled to the phase interpolator. The controller is configured to provide a digital timing code to the phase interpolator, and the phase interpolator is configured to apply a correction to the received digital timing code based, at least in part, on phase interpolator error correction data from a data structure containing phase interpolator error correction data.

    PHASE INTERPOLATOR FOR MODE TRANSITIONS

    公开(公告)号:US20230069329A1

    公开(公告)日:2023-03-02

    申请号:US17462167

    申请日:2021-08-31

    Abstract: A system includes a mixer of a phase interpolator. The mixer includes a dynamic load whose output signal is coupled to a subsequent stage of the phase interpolator. The dynamic load is configured to provide an alternating current (AC) signal to the subsequent stage of the phase interpolator as input clock signals. The mixer further includes a static load whose output signal is coupled to the subsequent stage of the phase interpolator in parallel with the respective output signal line of the dynamic load. The static load configured to provide a direct current (DC) signal to the phase interpolator temporarily in replacement of the respective AC signals to prevent output signals of the subsequent stage of the phase interpolator from being unpredictable.

    Phase interpolator for mode transitions

    公开(公告)号:US11682437B2

    公开(公告)日:2023-06-20

    申请号:US17462167

    申请日:2021-08-31

    Abstract: A system includes a mixer of a phase interpolator. The mixer includes a dynamic load whose output signal is coupled to a subsequent stage of the phase interpolator. The dynamic load is configured to provide an alternating current (AC) signal to the subsequent stage of the phase interpolator as input clock signals. The mixer further includes a static load whose output signal is coupled to the subsequent stage of the phase interpolator in parallel with the respective output signal line of the dynamic load. The static load configured to provide a direct current (DC) signal to the phase interpolator temporarily in replacement of the respective AC signals to prevent output signals of the subsequent stage of the phase interpolator from being unpredictable.

    QUADRATURE SIGNAL GENERATION
    6.
    发明申请

    公开(公告)号:US20200112423A1

    公开(公告)日:2020-04-09

    申请号:US16424743

    申请日:2019-05-29

    Abstract: Apparatuses and methods for quadrature signal generation are provided. An example includes a quadrature signal generator. The quadrature signal generator is configured to generate, based on a received differential signal, a plurality of quadrature clock signals at a same frequency as that of the received differential signal. The quadrature signal generator is also configured to provide the plurality of quadrature clock signals to a memory system.

    Phase interpolator
    7.
    发明授权

    公开(公告)号:US10425090B2

    公开(公告)日:2019-09-24

    申请号:US16043350

    申请日:2018-07-24

    Abstract: Apparatuses and methods for phase interpolators are provided. An example apparatus comprises a phase interpolator and a controller coupled to the phase interpolator. The controller is configured to provide a digital timing code to the phase interpolator, and the phase interpolator is configured to apply a correction to the received digital timing code based, at least in part, on phase interpolator error correction data from a data structure containing phase interpolator error correction data.

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