Via sidewall SOG nitridation for via filling
    1.
    发明授权
    Via sidewall SOG nitridation for via filling 失效
    通过侧壁SOG氮化通孔填充

    公开(公告)号:US5393702A

    公开(公告)日:1995-02-28

    申请号:US85955

    申请日:1993-07-06

    摘要: A new method of forming the dielectric layer of an integrated circuit is described. A thick insulating layer is formed over semiconductor device structures in and on a semiconductor substrate. A first metal layer is deposited over the thick insulating layer. The first metal layer is etched using conventional photolithography and etching techniques to form the desired metal pattern on the surface of the thick insulating layer. The intermetal dielectric layer is formed by first covering the patterned first metal layer with a layer of silicon oxide. The silicon oxide layer is covered with a layer of spin-on-glass material which is baked and cured. A second layer of silicon oxide completes the intermetal dielectric layer. Via openings are formed through the intermetal dielectric layer to the underlying patterned first metal layer. A silicon nitride cap is formed on the exposed surfaces of the spin-on-glass layer within the via openings to prevent outgassing from the intermetal dielectric layer, and thus to prevent poisoned via metallurgy. A second metal layer is deposited overlying the intermetal dielectric layer and within the via openings and fabrication of the integrated circuit is completed.

    摘要翻译: 描述形成集成电路的介电层的新方法。 在半导体衬底上半导体器件结构上形成厚的绝缘层。 第一金属层沉积在厚绝缘层上。 使用常规的光刻和蚀刻技术蚀刻第一金属层,以在厚绝缘层的表面上形成所需的金属图案。 金属间电介质层通过首先用一层氧化硅覆盖图案化的第一金属层而形成。 氧化硅层被被烘烤和固化的旋涂玻璃材料层覆盖。 第二层氧化硅完成金属间电介质层。 穿过开口通过金属间电介质层形成到下面的图案化的第一金属层。 在通孔开口内的旋涂玻​​璃层的露出表面上形成氮化硅帽,以防止从金属间电介质层脱气,从而防止通过冶金的中毒。 第二金属层沉积在金属间电介质层之上并且在通孔开口内,并且完成了集成电路的制造。

    Method of fabricating vias
    2.
    发明授权
    Method of fabricating vias 失效
    制作通孔的方法

    公开(公告)号:US06440841B2

    公开(公告)日:2002-08-27

    申请号:US09289859

    申请日:1999-04-12

    IPC分类号: H01L214763

    摘要: The present invention is a method of fabricating interconnects. A semiconductor substrate having a dielectric layer is provided. The dielectric layer has a via opening therein, which exposes the semiconductor substrate. Next, the surfaces of the via opening is covered with a conformal titanium layer formed by a sputtering process. The surface of the conformal titanium layer is covered with an Al—Si—Cu alloy layer formed by a sputtering process at a temperature of about 0° C. to 200° C. Then, the surface of the Al—Si—Cu alloy layer is covered with an Al—Cu alloy layer formed by a sputtering process at a temperature of about 380° C. to 450° C., which Al—Cu alloy layer fills the via opening. The Al—Cu alloy layer, the Al—Si—Cu alloy layer and the wetting layer on the dielectric layer are patterned by photolithography and etching process.

    摘要翻译: 本发明是一种制造互连的方法。 提供具有电介质层的半导体衬底。 介电层在其中具有通孔,露出半导体衬底。 接下来,通过开口的表面被通过溅射工艺形成的共形钛层覆盖。 共形钛层的表面被在约0℃至200℃的温度下通过溅射工艺形成的Al-Si-Cu合金层覆盖。然后,Al-Si-Cu合金层 在约380℃至450℃的温度下通过溅射工艺形成的Al-Cu合金层覆盖,Al-Cu合金层填充通孔。 通过光刻和蚀刻工艺对Al-Cu合金层,Al-Si-Cu合金层和电介质层上的润湿层进行图案化。

    Tungsten-plug process
    3.
    发明授权
    Tungsten-plug process 失效
    钨丝塞过程

    公开(公告)号:US5364817A

    公开(公告)日:1994-11-15

    申请号:US238664

    申请日:1994-05-05

    IPC分类号: H01L21/285 H01L21/283

    CPC分类号: H01L21/28512

    摘要: A method of metallization using a tungsten plug is described. A contact hole is opened to the semiconductor substrate through an insulating layer covering semiconductor structures in and on the semiconductor substrate. A glue layer is deposited conformally over the surface of the insulating layer and within the contact opening. A tungsten plug is formed within the contact opening. The glue layer is removed except for portions of the glue layer underneath the tungsten plug and on the lower sides of the tungsten plug. Ditches are left on the upper sides of the tungsten plug where the glue layer has been removed. The ditches around the tungsten plug are filled with a dielectric material. A second metallization is deposited and patterned. The patterned second metallization does not extend over one side portion of the tungsten plug; that is, there is no dog-bone formation. There is no junction damage through the side portion of the tungsten plug not covered by the second metallization because the dielectric material filling the ditches protects the glue layer from being etched away. In a second embodiment of the invention, after the contact hole is opened, the insulating layer is reflowed forming an overhang around the contact hole. A glue layer is deposited conformally over the surface of the insulating layer and within the contact opening. A tungsten plug is formed within the contact opening.

    摘要翻译: 描述了使用钨丝塞的金属化方法。 通过覆盖半导体衬底中半导体结构的绝缘层向半导体衬底开口接触孔。 粘合剂层保形地沉积在绝缘层的表面上并且在接触开口内。 在接触开口内形成钨塞。 除了钨丝塞下方的胶水层的部分和钨丝塞的下侧外,胶层除去。 沟槽留在已经去除胶层的钨插头的上侧。 钨插塞周围的沟槽填充有电介质材料。 沉积和图案化第二金属化。 图案化的第二金属化不在钨塞的一个侧面上延伸; 也就是说,没有狗骨形成。 由于填充沟槽的电介质材料保护胶层不会被蚀刻掉,所以没有被第二金属化覆盖的钨塞的侧部没有结损坏。 在本发明的第二实施例中,在接触孔打开之后,绝缘层被回流,在接触孔周围形成伸出。 粘合剂层保形地沉积在绝缘层的表面上并且在接触开口内。 在接触开口内形成钨塞。

    Fabricating method of glue layer and barrier layer
    4.
    发明授权
    Fabricating method of glue layer and barrier layer 有权
    胶层和阻隔层的制造方法

    公开(公告)号:US06207567B1

    公开(公告)日:2001-03-27

    申请号:US09290059

    申请日:1999-04-12

    IPC分类号: H01L2144

    CPC分类号: H01L21/76856 H01L21/76843

    摘要: A method of fabricating a glue layer and a barrier layer. A Ti layer is formed with a collimator sputtering in the via opening or the contact opening of the substrate. Through the control of flow of N2 and Ar, a nitride mode TiNx layer is formed on the Ti layer by sputtering. The nitride mode TiNx layer and the Ti layer uncovered by the nitride mode TiNx layer are treated with N2 RF plasma. This strengthens the structure of the nitride mode TiNx layer and allows the reaction with the exposed Ti layer so that it is transformed into a TiNx layer.

    摘要翻译: 一种制造胶层和阻挡层的方法。 在基板的通路开口或接触开口中用准直器溅射形成Ti层。 通过控制N2和Ar的流动,通过溅射在Ti层上形成氮化物模式TiNx层。 用N 2射频等离子体处理由氮化物模式TiNx层未覆盖的氮化物模式TiNx层和Ti层。 这增强了氮化物模式TiNx层的结构,并允许与暴露的Ti层的反应,使其转变成TiNx层。

    Method of making a reliable barrier layer
    5.
    发明授权
    Method of making a reliable barrier layer 失效
    制作可靠屏障层的方法

    公开(公告)号:US5739046A

    公开(公告)日:1998-04-14

    申请号:US657058

    申请日:1996-05-28

    摘要: A new method of forming a metal diffusion barrier layer is described. Semiconductor device structures are formed in and on a semiconductor substrate. At least one dielectric layer covers the semiconductor structures and at least one contact hole has been opened through the dielectric layer(s) to the semiconductor substrate. A metal diffusion barrier layer is now formed using the following steps: In the first step, a thin layer of titanium is deposited conformally over the surface of the dielectric layer(s) and within the contact opening(s) and annealed in a nitrogen atmosphere at a temperature of between about 580.degree. to 630.degree. C. for between about 20 to 120 seconds. The second step is to form stable and adhesive titanium compounds on the pre-metal dielectric layer as well as to form a low resistance silicide on the contact silicon by annealing at between about 800.degree. to 900.degree. C. for between about 5 to 60 seconds. The final step is to release the system stress by tempering the layer at a temperature of between about 600.degree. to 750.degree. C. This completes the barrier layer which has good adhesion to the dielectric layer(s) and, therefore, promotes improved pad bonding yield.

    摘要翻译: 描述形成金属扩散阻挡层的新方法。 在半导体衬底中形成半导体器件结构。 至少一个电介质层覆盖半导体结构,并且至少一个接触孔已经通过介电层被打开到半导体衬底。 现在通过以下步骤形成金属扩散阻挡层:在第一步骤中,将薄的钛层保形地沉积在电介质层的表面和接触开口内,并在氮气气氛中退火 在约580℃至630℃之间的温度下进行约20至120秒。 第二步是在金属前介电层上形成稳定且粘合的钛化合物,并在接触硅上形成低电阻硅化物,在约800-900℃之间退火约5至60秒 。 最后一步是通过在约600至750℃的温度下回火层来释放系统应力。这完成了与电介质层具有良好粘附性的阻挡层,因此促进改进的焊盘接合 产量。