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公开(公告)号:US20200098701A1
公开(公告)日:2020-03-26
申请号:US16472097
申请日:2017-02-09
发明人: Hiroyuki HARADA , Naoki YOSHIMATSU , Osamu USUI , Yuji IMOTO , Yuki YOSHIOKA
IPC分类号: H01L23/00 , H01L23/047 , H01L23/31 , H01L23/495
摘要: A semiconductor chip (6) is disposed on the insulation substrate (2). A lead frame (8) is bonded to an upper surface of the semiconductor chip (6). A sealing resin (12) covers the semiconductor chip (6), the insulation substrate (2), and the lead frame (8). A stress mitigation resin (13) having a lower elastic modulus than that of the sealing resin (12) is partially applied to an end of the lead frame (8).
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公开(公告)号:US20150008570A1
公开(公告)日:2015-01-08
申请号:US14245261
申请日:2014-04-04
发明人: Kiyoshi ARAI , Osamu USUI
IPC分类号: H01L23/367 , H01L23/42 , H01L23/492
CPC分类号: H01L23/3675 , H01L23/053 , H01L23/24 , H01L23/3735 , H01L23/42 , H01L23/4334 , H01L23/492 , H01L23/49811 , H01L2224/48091 , H01L2224/73265 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00014 , H01L2924/00
摘要: A semiconductor device according to the present invention includes a base plate, an insulating layer provided on an upper surface of the base plate, a metal pattern provided on an upper surface of the insulating layer, a semiconductor element bonded to the metal pattern, and an insulating substrate disposed to be in contact with an upper surface of the semiconductor element. An end of the insulating substrate is located outside the semiconductor element in plan view. The end of the insulating substrate and the metal pattern are directly or indirectly bonded. The semiconductor element includes an electrode on the upper surface. A portion of the insulating substrate, in which the electrode on the upper surface of the semiconductor element overlaps in plan view, is provided with a through-hole.
摘要翻译: 根据本发明的半导体器件包括基板,设置在基板的上表面上的绝缘层,设置在绝缘层的上表面上的金属图案,接合到金属图案的半导体元件,以及 绝缘基板,设置成与半导体元件的上表面接触。 在平面图中,绝缘基板的一端位于半导体元件的外侧。 绝缘基板的端部和金属图案直接或间接地结合。 半导体元件包括在上表面上的电极。 在半导体元件的上表面上的电极在平面图中重叠的绝缘基板的一部分设置有通孔。
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公开(公告)号:US20190295924A1
公开(公告)日:2019-09-26
申请号:US16316419
申请日:2016-10-21
发明人: Tatsuya KAWASE , Yosuke NAKATA , Yuji IMOTO , Osamu USUI
IPC分类号: H01L23/473 , H01L25/18 , H02M7/00 , H02M7/5387
摘要: A plurality of semiconductor devices (4a-4f, 5a-5f) are provided on an upper surface of the conductive base plate (1) via an insulating substrate (2) and a conductive pattern (3a-3d). A plurality of fins (6) are provided on a lower surface of the conductive base plate (1). A heat dissipating base plate (7) is provided to tips of the plurality of fins (6). A cooler (8) having an inflow port (9a) and an outflow port (9b) in a bottom surface surrounds the plurality of fins (6) and the heat dissipating base plate (7). A partition (10) separates a space surrounded by the cooler (8) and the heat dissipating base plate (7) into an inflow-side space (11a) connected to the inflow port (9a) and an outflow-side space (11b) connected to the outflow port (9b). A first slit (12a) is provided in a central portion of the heat dissipating base plate (7). Second and third slits (12b,12c) are respectively provided on both sides of the heat dissipating base plate (7) along a direction from an inflow side to an outflow side. One of the first slit (12a) and the second and third slits (12b,12c) is an inflow-side slit connected to the inflow-side space (11a) and the other is an outflow-side slit connected to the outflow-side space (11b).
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公开(公告)号:US20150061111A1
公开(公告)日:2015-03-05
申请号:US14246475
申请日:2014-04-07
发明人: Miho NAGAI , Yuji IMOTO , Osamu USUI
IPC分类号: H01L23/46
CPC分类号: H01L23/46 , F28F3/02 , H01L23/473 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device includes a semiconductor element, a base plate having an upper surface on which the semiconductor element is mounted, a cooling fin disposed on a lower surface of the base plate, a jacket disposed in a sealing manner on the lower surface of the base plate, the jacket surrounding the cooling fin, and a header partition wall formed separately from the jacket and fixed to the jacket on the lower side of the cooling fin in the jacket, the header partition wall forming a header and a flow path for causing a refrigerant flow to the cooling fin.
摘要翻译: 半导体器件包括半导体元件,具有安装半导体元件的上表面的基板,设置在基板的下表面上的冷却翅片,以密封方式设置在基底的下表面上的护套 围绕冷却翅片的护套和与护套分开形成并固定在护套中的冷却翅片的下侧上的护套的头部分隔壁,形成头部的头部分隔壁和用于引起 制冷剂流向散热片。
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公开(公告)号:US20200343106A1
公开(公告)日:2020-10-29
申请号:US16605890
申请日:2017-09-04
发明人: Osamu USUI
摘要: A semiconductor chip (2) includes a surface electrode (3). A conductive bonding member (8) includes first and second bonding members (8a,8b) provided on the surface electrode (3). A lead electrode (9) is bonded to a part of the surface electrode (3) via the first bonding member (8a) and has no contact with the second bonding member (8b). A signal wire (11) is bonded to the surface electrode (3). The second bonding member (8b) is arranged between the first bonding member (8a) and the signal wire (11). A thickness of the first bonding member (8a) is larger than a thickness of the second bonding member (8b).
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公开(公告)号:US20190267297A1
公开(公告)日:2019-08-29
申请号:US16319975
申请日:2016-10-24
发明人: Naoki YOSHIMATSU , Osamu USUI , Yuji IMOTO
IPC分类号: H01L23/057 , H01L23/31 , H01L23/498 , H01L21/48 , H01L21/56
摘要: First and second electrodes (12,13) are provided on an upper surface of the semiconductor chip (9) and spaced apart from each other. A wiring member (15) includes a first joint (15a) bonded to the first electrode (12) and a second joint (15b) bonded to the second electrode (13). Resin (2) seals the semiconductor chip (9), the first and second electrodes (12,13) and the wiring member (15). A hole (18) extending through the wiring member (15) up and down is provided between the first joint (15a) and the second joint (15b).
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