公开(公告)号：US20070108741A1

公开(公告)日：2007-05-17

申请号：US11363349

申请日：2006-02-27

申请人： Mitsuo Yasuda ,  Ryoichi Katagishi ,  Yusuke Ishikuro ,  Hiroshi Yokouchi

发明人： Mitsuo Yasuda ,  Ryoichi Katagishi ,  Yusuke Ishikuro ,  Hiroshi Yokouchi

IPC分类号： B60R21/20

CPC分类号： B60R21/205 ,  B29C65/06 ,  B29C65/0618 ,  B29C65/069 ,  B29C66/112 ,  B29C66/1122 ,  B29C66/114 ,  B29C66/131 ,  B29C66/30221 ,  B29C66/30223 ,  B29C66/532 ,  B29C66/54 ,  B29C66/71 ,  B29C66/73115 ,  B29C66/73116 ,  B29C66/81427 ,  B29C66/8322 ,  B29K2023/00 ,  B29K2023/12 ,  B29K2101/12 ,  B29L2031/3038 ,  B60R21/215 ,  B60R21/2165

摘要： The invention provides an airbag apparatus for an automobile in which a frame and reinforcement members can be vibration-welded to an instrument panel with uniform strength and the product can be prevented from being thermally deformed or discolored by heat caused by the vibration welding. First weld ribs projectedly provided on joining surfaces of an joint flange of a frame are extended long in a vibration direction of vibration welding, second weld ribs projectedly provided on joining surfaces of reinforcements of reinforcement members are extended long in the vibration direction of the vibration welding, and in particular, the lengths of the first weld ribs and the second weld ribs extending in the vibration direction are set to be three times or more as long as an amplitude of the vibration welding. Passages for flowing a cooling fluid along the first weld ribs are provided on the joining surfaces of the joint flange, and furthermore, passages for flowing the cooling fluid along the second weld ribs are provided on the joining surfaces of the reinforcements.

摘要翻译： 本发明提供了一种用于汽车的气囊装置，其中框架和加强构件能够以均匀的强度被振动焊接到仪表板上，并且可以防止产品因振动焊接引起的热量而变热或变色。 突出地设置在框架的接合凸缘的接合表面上的第一焊接肋沿振动焊接的振动方向延伸，突出地设置在加强构件的加强件的接合表面上的第二焊接肋在振动焊接的振动方向上延伸很长 特别地，将振动方向上延伸的第一焊接肋和第二焊接肋的长度设定为振动焊接的振幅的三倍以上。 沿着第一焊接肋流动冷却流体的通道设置在接合凸缘的接合表面上，此外，在加强件的接合表面上设置有用于使冷却流体沿第二焊接肋流动的通道。

公开(公告)号：US07484752B2

公开(公告)日：2009-02-03

申请号：US11363349

申请日：2006-02-27

申请人： Mitsuo Yasuda ,  Ryoichi Katagishi ,  Yusuke Ishikuro ,  Hiroshi Yokouchi

发明人： Mitsuo Yasuda ,  Ryoichi Katagishi ,  Yusuke Ishikuro ,  Hiroshi Yokouchi

IPC分类号： B60R21/20

CPC分类号： B60R21/205 ,  B29C65/06 ,  B29C65/0618 ,  B29C65/069 ,  B29C66/112 ,  B29C66/1122 ,  B29C66/114 ,  B29C66/131 ,  B29C66/30221 ,  B29C66/30223 ,  B29C66/532 ,  B29C66/54 ,  B29C66/71 ,  B29C66/73115 ,  B29C66/73116 ,  B29C66/81427 ,  B29C66/8322 ,  B29K2023/00 ,  B29K2023/12 ,  B29K2101/12 ,  B29L2031/3038 ,  B60R21/215 ,  B60R21/2165

摘要： A vehicle airbag apparatus in which a frame and reinforcement members can be vibration-welded to an instrument panel with uniform strength and without distortion or discoloration of the instrument panel cover caused by the vibration welding. First weld ribs on a frame and second weld ribs on reinforcement members joined to the frame have a length which extends in the direction of vibration welding. The lengths of the first weld ribs and the second weld ribs extending in the vibration direction are set to be three times or more as long as an amplitude of the vibration welding. Passages for flowing a cooling fluid along the first weld ribs are provided on the joining surfaces of the joint flange, and furthermore, passages for flowing the cooling fluid along the second weld ribs may be provided on the joining surfaces of the reinforcements.

摘要翻译： 一种车辆安全气囊装置，其中框架和加强构件能够以均匀的强度振动焊接到仪表板，并且由振动焊接引起的仪表板盖的变形或变色。 框架上的第一焊接肋和连接到框架的加强构件上的第二焊接肋具有在振动焊接方向上延伸的长度。 在振动方向上延伸的第一焊接肋和第二焊接肋的长度被设定为振动焊接的振幅的三倍以上。 在连接凸缘的接合表面上设置有沿着第一焊接肋流动冷却流体的通道，此外，可以在加强件的接合表面上设置用于使冷却流体沿着第二焊接肋流动的通道。

公开(公告)号：US20090265577A1

公开(公告)日：2009-10-22

申请号：US12213687

申请日：2008-06-23

申请人： Naoki Haramai ,  Hiroshi Yokouchi ,  Ryu Gemba ,  Atsushi Kondo ,  Kazuhiro Oyama

发明人： Naoki Haramai ,  Hiroshi Yokouchi ,  Ryu Gemba ,  Atsushi Kondo ,  Kazuhiro Oyama

IPC分类号： G06F11/07

CPC分类号： H04L41/0677 ,  H04L41/0226 ,  H04L69/40

摘要： Provided is a method of controlling a computer system that includes: a computer; a first storage device connected to the computer via a first path and a second path; and a second storage device externally-connected to the first storage system via a third path and connected to the computer via a fourth path, the first storage device providing a first storage area to the computer, the second storage device including a second storage area corresponding to the first storage area, the method including: judging whether or not a fault has occurred in at least one of the first to fourth paths; selecting, a path used for access to the first or second storage area; and transmitting the access request for the first or second storage area by using the selected path. Accordingly, in the computer system, an application can be prevented from being stopped despite a fault in a path.

摘要翻译： 提供一种控制计算机系统的方法，其包括：计算机; 经由第一路径和第二路径连接到所述计算机的第一存储装置; 以及第二存储装置，经由第三路径外部连接到所述第一存储系统，并经由第四路径连接到所述计算机，所述第一存储装置向所述计算机提供第一存储区域，所述第二存储装置包括相应的第二存储区域 所述方法包括：判断在所述第一至第四路径中的至少一个路径中是否发生故障; 选择用于访问所述第一或第二存储区域的路径; 以及通过使用所选择的路径来发送对所述第一或第二存储区域的访问请求。 因此，在计算机系统中，尽管路径中存在故障，但是可以防止应用程序停止。

公开(公告)号：US4701888A

公开(公告)日：1987-10-20

申请号：US772943

申请日：1985-09-05

申请人： Hiroshi Yokouchi

发明人： Hiroshi Yokouchi

IPC分类号： G06F3/00 ,  G06F13/40 ,  G11C11/40

CPC分类号： G06F13/4077

摘要： A data bus discharging circuit capable of enabling the high-speed operation of a microprocessor, includes a control signal generating circuit which provides control signals, a precharge/enable signal generating circuit which provides a precharge control signal and an enable signal, a discharge detecting circuit which detects small changes in the potential of the bit lines of the data bus, and a discharging circuit which sets the bit lines of the data bus selectively at a ground potential in response to the discharge detecting circuit.

摘要翻译： 能够实现微处理器高速运行的数据总线放电电路包括提供控制信号的控制信号发生电路，提供预充电控制信号和使能信号的预充电/使能信号发生电路，放电检测电路 其检测数据总线的位线的电位的小变化，以及放电电路，其响应于放电检测电路选择性地将数据总线的位线设置在接地电位。

公开(公告)号：US4796211A

公开(公告)日：1989-01-03

申请号：US947681

申请日：1986-12-30

申请人： Hiroshi Yokouchi ,  Makoto Mogi

发明人： Hiroshi Yokouchi ,  Makoto Mogi

IPC分类号： G06F11/30 ,  G06F11/00 ,  G06F11/08

CPC分类号： G06F11/0757

摘要： In a watchdog timer comprising a reset data detection circuit for detecting input reset data and outputting a reset signal, and a first counter that outputs a carry signal unless, before its count overflows, it receives a reset signal from said reset data detection circuit, the rest data detection circuit comprises a latch circuit for latching said reset data, a second couner for counting the number of times a said reset signal is generated, and a comparator for comparing the output data from the latch circuit and the second counter and outputting the reset signal when the output data from the latch circuit and the outputting the reset signal match.

摘要翻译： 在看门狗定时器中，包括用于检测输入复位数据并输出复位信号的复位数据检测电路，以及输出进位信号的第一计数器，除非在其计数溢出之前，它从所述复位数据检测电路接收复位信号， 休息数据检测电路包括用于锁存所述复位数据的锁存电路，用于对产生所述复位信号的次数进行计数的第二协调器，以及用于比较来自锁存电路和第二计数器的输出数据并输出复位的比较器 当来自锁存电路的输出数据和输出复位信号匹配时发出信号。

公开(公告)号：US4680491A

公开(公告)日：1987-07-14

申请号：US739304

申请日：1985-05-29

申请人： Hiroshi Yokouchi ,  Kazuhiko Miyazaki

发明人： Hiroshi Yokouchi ,  Kazuhiko Miyazaki

IPC分类号： G06F3/00 ,  G06F13/12 ,  G06F13/38 ,  G06F13/40 ,  G06F15/78 ,  G11C11/409 ,  H03K5/02 ,  H03K19/0175 ,  H03K17/56 ,  H03K19/096 ,  H03K19/00

CPC分类号： G06F13/4072 ,  G06F13/38 ,  H03K5/026 ,  Y02B60/1228 ,  Y02B60/1235

摘要： In a CMOS type input-output circuit having an input control circuit, an output control circuit, a buffer circuit, a CMOS output buffer circuit and an input buffer circuit, the input-output circuit being capable of bidirectional transmission of information between a data bus and an I/O port, improvements on the control circuit are embodied by selecting a gate circuit in the input control circuit corresponding to that in the output control circuit. The output control circuit is connected to the input control circuit and the CMOS output buffer circuit. The CMOS output buffer circuit is connected to the input control circuit and the I/O port. Upon inputting a signal to both control circuits, the output control circuit causes the CMOS output buffer circuit to be electrically floating; the input control circuit outputs a level fixing signal regardless of the logic level of the I/O port.

摘要翻译： 在具有输入控制电路，输出控制电路，缓冲电路，CMOS输出缓冲电路和输入缓冲电路的CMOS型输入输出电路中，输入输出电路能够在数据总线 和I / O端口，通过选择输入控制电路中对应于输出控制电路的门电路来实现对控制电路的改进。 输出控制电路连接到输入控制电路和CMOS输出缓冲电路。 CMOS输出缓冲电路连接到输入控制电路和I / O端口。 当输入到两个控制电路的信号时，输出控制电路使CMOS输出缓冲电路电浮动; 输入控制电路输出电平固定信号，而不管I / O端口的逻辑电平。

公开(公告)号：US09323468B2

公开(公告)日：2016-04-26

申请号：US13574929

申请日：2012-02-06

申请人： Kazuhiro Oyama ,  Hiroshi Yokouchi

发明人： Kazuhiro Oyama ,  Hiroshi Yokouchi

IPC分类号： G06F3/06

CPC分类号： G06F3/0635 ,  G06F3/061 ,  G06F3/0653 ,  G06F3/0658 ,  G06F3/067 ,  G06F3/0689

摘要： A storage apparatus includes multiple ports communicable with a server, multiple processor cores and multiple LUs (Logical Units). For each port, a port responsible core, which is a processor core to accept an I/O request received by the port, is specified. For each LU, an LU responsible core, which is a processor core responsible for I/O, is specified. The LU responsible core may be dynamically changed. The server periodically acquires identification information about the LU responsible cores from the storage apparatus. When transmitting an I/O request, the server selects a non-cross call path, which is such a path that the LU responsible core and the port responsible core are the same processor core, from among multiple paths to an I/O destination LU, which is an LU specified by the transmission target I/O request, and transmits the transmission target I/O request via the selected path.

摘要翻译： 存储装置包括可与服务器通信的多个端口，多个处理器核和多个LU（逻辑单元）。 对于每个端口，指定端口负责核心，它是接收端口接收的I / O请求的处理器核心。 对于每个LU，指定了一个LU负责的核心，它是负责I / O的处理器核心。 LU负责的核心可能会动态更改。 服务器周期性地从存储装置获取关于LU负责的核心的标识信息。 当发送I / O请求时，服务器从多个到I / O目的地LU的路径中选择非交叉呼叫路径，这是LU负责的核心和负责核心的端口是相同的处理器核心的路径 ，其是由发送目标I / O请求指定的LU，并且经由所选择的路径发送发送目标I / O请求。

公开(公告)号：US07873759B2

公开(公告)日：2011-01-18

申请号：US12342314

申请日：2008-12-23

申请人： Shigenori Tomonaga ,  Hiroshi Yokouchi ,  Nobuo Kobayashi

发明人： Shigenori Tomonaga ,  Hiroshi Yokouchi ,  Nobuo Kobayashi

IPC分类号： G06F3/00 ,  G06F13/38

CPC分类号： G06F13/4022

摘要： Provided is an information processing system that communicates with a storage apparatus through a plurality of paths Pi (i=1 to n, where n is a total number of the paths), and that issues an I/O to the storage apparatus through one of the paths Pi. The information processing system sets weights Wi for the respective paths Pi; obtains an I/O issue interval di of each of the paths Pi by dividing a sum total ΣWi of the weights Wi by the weight Wi set for the path Pi; obtains I/O issue timings ti(m)of each of the paths Pi by using the following equation: ti(m)=di/C+m·di (m=0, 1, 2, . . . ) (where C is a constant); and issues the I/Os to the paths Pi in an order corresponding to the an order of the I/O issue timings ti(m) chronologically arranged.

摘要翻译： 提供了一种信息处理系统，其通过多个路径Pi（i = 1至n，其中n是路径的总数）与存储装置进行通信，并且通过以下之一向存储装置发出I / O 路径Pi。 信息处理系统设定各个路径Pi的权重Wi; 通过将权重Wi的总和＆Sgr; Wi除以为路径Pi设置的权重Wi来获得每个路径Pi的I / O问题间隔di; 通过使用以下等式获得每个路径Pi的I / O问题定时ti（m）：ti（m）= di / C + m·di（m = 0,1,2，...）（其中C 是一个常数）; 并以对应于按时间顺序排列的I / O发布定时ti（m）的顺序的顺序将I / O发布到路径Pi。

公开(公告)号：US07519620B2

公开(公告)日：2009-04-14

申请号：US10785990

申请日：2004-02-26

申请人： Hiroshi Yokouchi

发明人： Hiroshi Yokouchi

IPC分类号： G06F17/30

CPC分类号： G06F17/30578 ,  G06F17/30581 ,  Y10S707/99932 ,  Y10S707/99934 ,  Y10S707/99943

摘要： Data of a plurality of master tables can be replicated in one replica table. A job to access a plurality of tables can be executed by accessing one replica table, and hence the job execution time is minimized. A correspondence is established between data using, as a key, particular data in the data of a plurality of master tables. The data field for the key is defined by the replication definition. Timing of replication for the replica table is also defined in the program to execute replication. The replication program generates, at execution thereof, the control table according to the definition and manages the operation states of a plurality of master tables and the replication state of the replica table to thereby conduct replication for the replica table at the defined timing.

摘要翻译： 可以在一个副本表中复制多个主表的数据。 可以通过访问一个副本表来执行访问多个表的作业，从而最小化作业执行时间。 在使用多个主表的数据中的特定数据作为关键字的数据之间建立对应关系。 密钥的数据字段由复制定义定义。 副本表的复制时间也在执行复制的程序中定义。 复制程序在执行时根据定义生成控制表，并管理多个主表的操作状态和副本表的复制状态，从而在定义的定时进行复制表的复制。

公开(公告)号：US20050108450A1

公开(公告)日：2005-05-19

申请号：US10802859

申请日：2004-03-18

申请人： Hirofumi Sahara ,  Masuji Suzuki ,  Hiroshi Yokouchi

发明人： Hirofumi Sahara ,  Masuji Suzuki ,  Hiroshi Yokouchi

IPC分类号： G06F12/08 ,  G06F3/06 ,  G06F3/00

CPC分类号： G06F3/061 ,  G06F3/0635 ,  G06F3/0659 ,  G06F3/0683 ,  G06F2206/1012

摘要： In an information processing system comprising a storage equipment which includes a logical unit logically assigned to physical devices and an information processing apparatus which sends data input/output requests to the storage equipment, wherein the data input/output requests are transferred through logical paths serving as communication paths to the logical unit, the information processing apparatus comprises a path selection management section which manages configurations of a plurality of blocks into which the logical unit is divided, an I/O request allocation section which allocates data input/output requests to be transmitted to the storage equipment to the logical paths, and I/O processing units which transmit the data input/output requests through the logical paths, according to the allocation determined by the I/O request allocation section, pursuant to an established protocol, wherein the path selection management section assigns at least one logical path to one block.

摘要翻译： 在包括逻辑地分配给物理设备的逻辑单元的存储设备和向存储设备发送数据输入/输出请求的信息处理设备的信息处理系统中，其中数据输入/输出请求通过用作 到逻辑单元的通信路径，信息处理设备包括管理分配了逻辑单元的多个块的配置的路径选择管理部分，分配要发送的数据输入/输出请求的I / O请求分配部分 根据建立的协议，根据由I / O请求分配部分确定的分配，通过逻辑路径传送数据输入/输出请求的I / O处理单元，其中， 路径选择管理部分将至少一个逻辑路径分配给一个块。