公开(公告)号：US09030858B2

公开(公告)日：2015-05-12

申请号：US13624968

申请日：2012-09-23

Applicant: Monolithic 3D Inc.

Inventor： Zvi Or-Bach ,  Deepak Sekar ,  Brian Cronquist ,  Paul Lim

IPC: G11C11/34 ,  H01L27/108 ,  G11C5/02 ,  G11C5/06 ,  H01L27/06 ,  H01L29/78 ,  G11C11/406 ,  H01L23/00 ,  H01L27/02

CPC classification number: H01L27/10873 ,  G11C5/025 ,  G11C5/063 ,  G11C11/406 ,  G11C2211/4016 ,  H01L24/16 ,  H01L24/94 ,  H01L27/0203 ,  H01L27/0688 ,  H01L27/10802 ,  H01L27/10894 ,  H01L27/10897 ,  H01L29/7841 ,  H01L29/785 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/12033 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2224/81 ,  H01L2924/00

Abstract: A semiconductor device, including: a first semiconductor layer including first transistors, wherein the first transistors are interconnected by at least one metal layer including aluminum or copper; and a second mono-crystallized semiconductor layer including second transistors and overlaying the at least one metal layer, wherein the at least one metal layer is in-between the first semiconductor layer and the second mono-crystallized semiconductor layer, wherein the second mono-crystallized semiconductor layer is less than 100 nm in thickness, and wherein the second transistors include horizontally oriented transistors.

Abstract translation: 一种半导体器件，包括：包括第一晶体管的第一半导体层，其中所述第一晶体管通过包括铝或铜的至少一个金属层互连; 以及包括第二晶体管并覆盖所述至少一个金属层的第二单结晶半导体层，其中所述至少一个金属层位于所述第一半导体层和所述第二单结晶半导体层之间，其中所述第二单结晶半导体层 半导体层的厚度小于100nm，其中第二晶体管包括水平取向的晶体管。

公开(公告)号：US10943934B2

公开(公告)日：2021-03-09

申请号：US17027217

申请日：2020-09-21

Applicant: Monolithic 3D Inc.

Inventor： Zvi Or-Bach ,  Deepak C. Sekar ,  Paul Lim

IPC: H01L27/146 ,  H01L31/0232 ,  H01L25/04 ,  H01L31/0368 ,  H01L31/102 ,  H01L27/28 ,  H01L27/12

Abstract: A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including an optical waveguide, where the second level is disposed above the first level, where the first level includes crystalline silicon; and an oxide layer disposed between the first level and the second level, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.

公开(公告)号：US20210005762A1

公开(公告)日：2021-01-07

申请号：US17027217

申请日：2020-09-21

Applicant: Monolithic 3D Inc.

Inventor： Zvi Or-Bach ,  Deepak C. Sekar ,  Paul Lim

IPC: H01L31/0232 ,  H01L31/102 ,  H01L31/0368 ,  H01L25/04

Abstract: A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including an optical waveguide, where the second level is disposed above the first level, where the first level includes crystalline silicon; and an oxide layer disposed between the first level and the second level, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.