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公开(公告)号:US10607780B2
公开(公告)日:2020-03-31
申请号:US15671644
申请日:2017-08-08
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tatsuya Izumi , Tomotaka Hirata
Abstract: A ceramic electronic component or a dielectric ceramic composition having a first element group and a second element group. The first element group consists of Ba, Si, and Al, and contains in 100 parts by weight of the first element group, 20 to 40 parts by weight of BaO, 48 to 75 parts by weight of SiO2, and 5 to 20 parts by weight of Al2O3. The second element group consists of at least one of Ti and Fe, Mn, Sr, and Mg, and contains, with respect to 100 parts by weight of the first element group, 1 to 10 parts by weight of MnO, 1 to 35 parts by weight of SrO, 0.1 to 6 parts by weight of MgO, and 1 to 35 parts by weight of TiO2 and/or Fe2O3.
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公开(公告)号:US10008327B2
公开(公告)日:2018-06-26
申请号:US15204110
申请日:2016-07-07
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Shinya Isota , Tatsuya Izumi , Tomotaka Hirata , Yasuhiro Nishisaka
CPC classification number: H01G4/1245 , C04B35/49 , C04B2235/3208 , C04B2235/3213 , C04B2235/3215 , C04B2235/3224 , C04B2235/3227 , C04B2235/3229 , C04B2235/3239 , C04B2235/3262 , C04B2235/3418 , C04B2235/5445 , C04B2235/5454 , C04B2235/6562 , C04B2235/6583 , C04B2235/72 , C04B2235/768 , C04B2235/785 , C04B2237/595 , C04B2237/70 , H01G4/0085 , H01G4/12 , H01G4/1227 , H01G4/30
Abstract: A multilayer ceramic capacitor that includes a laminate which has a plurality of dielectric layers and a plurality of internal electrode layers respectively laminated. The dielectric layers are a perovskite type structure containing Ba, Sr, Zr, Ti and Hf, and optionally Ca, and further include V, wherein (number of moles of Sr)/(number of moles of Ba+number of moles of Ca+number of moles of Sr) is 0.6 to 0.95, (number of moles of Zr)/(number of moles of Zr+number of moles of Ti+number of moles of Hf) is 0.9 to 0.98, thicknesses of the dielectric layers are 1 μm or less, and an average particle size of dielectric particles constituting the dielectric layers is 0.8 μm or less.
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公开(公告)号:US20170018358A1
公开(公告)日:2017-01-19
申请号:US15204110
申请日:2016-07-07
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Shinya lsota , Tatsuya Izumi , Tomotaka Hirata , Yasuhiro Nishisaka
CPC classification number: H01G4/1245 , C04B35/49 , C04B2235/3208 , C04B2235/3213 , C04B2235/3215 , C04B2235/3224 , C04B2235/3227 , C04B2235/3229 , C04B2235/3239 , C04B2235/3262 , C04B2235/3418 , C04B2235/5445 , C04B2235/5454 , C04B2235/6562 , C04B2235/6583 , C04B2235/72 , C04B2235/768 , C04B2235/785 , C04B2237/595 , C04B2237/70 , H01G4/0085 , H01G4/12 , H01G4/1227 , H01G4/30
Abstract: A multilayer ceramic capacitor that includes a laminate which has a plurality of dielectric layers and a plurality of internal electrode layers respectively laminated. The dielectric layers are a perovskite type structure containing Ba, Sr, Zr, Ti and Hf, and optionally Ca, and further include V, wherein (number of moles of Sr)/(number of moles of Ba+number of moles of Ca+number of moles of Sr) is 0.6 to 0.95, (number of moles of Zr)/(number of moles of Zr+number of moles of Ti+number of moles of Hf) is 0.9 to 0.98, thicknesses of the dielectric layers are 1 μm or less, and an average particle size of dielectric particles constituting the dielectric layers is 0.8 μm or less.
Abstract translation: 一种多层陶瓷电容器,其包括分别层叠有多个电介质层和多个内部电极层的层叠体。 电介质层是包含Ba,Sr,Zr,Ti和Hf以及任选的Ca的钙钛矿型结构,并且还包括V,其中(Sr的摩尔数)/(Ba的摩尔数+ Ca的摩尔数) Sr的摩尔数为0.6〜0.95(Zr的摩尔数)/(Zr的摩尔数+ Ti的摩尔数+ Hf的摩尔数)为0.9〜0.98,电介质层的厚度为1 构成电介质层的电介质粒子的平均粒径为0.8μm以下。
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公开(公告)号:US12073997B2
公开(公告)日:2024-08-27
申请号:US17835282
申请日:2022-06-08
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tatsuya Izumi
Abstract: A multilayer ceramic capacitor includes internal electrode layers and dielectric layers laminated alternately, and external electrodes on end surfaces. The internal electrode layers extend in a length direction and a width direction. The dielectric layers include about 100 moles or more and about 101 moles or less of Ca with respect to 100 moles of Zr. One side in the length direction of the internal electrode layers is connected to one of the external electrodes. Another side of the internal electrode layers is not connected to the external electrodes. A length at a middle portion in the width direction of the internal electrode layers is defined as L1, and a length at an end portion in the width direction is defined as L2, the internal electrode layers include a curved end side extending in the width direction so that L2
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公开(公告)号:US11158457B2
公开(公告)日:2021-10-26
申请号:US16659596
申请日:2019-10-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasuko Ooe , Tatsuya Izumi , Tomotaka Hirata
Abstract: A dielectric ceramic composition includes, as a main component, a perovskite compound containing Sr and Zr and may contain Ca and/or Ti, further contains Li and Si, and may contain Mn. When a total content of Zr and Ti is 100 parts by mol, a total content (100×m) of parts by mol of Sr and Ca is 0.8≤m≤1.3, a content a of parts by mol of Mn is 0≤a≤10, a content b of parts by mol of Li is 5≤b≤15, a content c of parts by mol of Si is 20≤c≤40, a molar ratio x of Ca/(Sr+Ca) is 0≤x≤0.8, and a molar ratio y of Ti/(Zr+Ti) is 0≤y≤0.5.
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公开(公告)号:US12100559B2
公开(公告)日:2024-09-24
申请号:US18328258
申请日:2023-06-02
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tatsuya Izumi , Tomotaka Hirata
IPC: H01G4/30 , C04B35/057 , H01G4/008 , H01G4/012 , H01G4/12
CPC classification number: H01G4/30 , C04B35/057 , H01G4/008 , H01G4/012 , H01G4/1236 , C04B2235/3206 , C04B2235/3208
Abstract: A multilayer electronic component that includes a stacked body having therein a plurality of dielectric layers including a CZ-based perovskite phase and an element M2, a plurality of internal electrode layers including Ni, and an interface layer including the element M2 in at least a portion of an interface with the plurality of internal electrode layers. Element M2 is an element that has a binding energy between the CZ-based perovskite phase and Ni via the element M2 of less than or equal to −12.3 eV by first-principles calculation using a pseudopotential method. When amounts of elements included in the dielectric layers are expressed as parts by mol, a ratio m2 of an amount of the element M2 to an amount of the Zr in the interface layer is 0.03≤m2≤0.25.
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公开(公告)号:US11972903B2
公开(公告)日:2024-04-30
申请号:US17382418
申请日:2021-07-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tatsuya Izumi , Yuu Mikami
IPC: H01G4/30 , C04B35/465 , C04B35/491 , H01G4/008 , H01G4/012 , H01G4/12
CPC classification number: H01G4/30 , C04B35/465 , C04B35/491 , H01G4/008 , H01G4/0085 , H01G4/012 , H01G4/1209 , C04B2235/3248
Abstract: A multilayer ceramic capacitor includes a multilayer body including a plurality of dielectric layers and a plurality of internal electrodes, wherein the dielectric layers and the internal electrodes are stacked alternately; and external electrodes provided on end surfaces of the multilayer body and electrically connected to the internal electrodes, wherein the dielectric layers each include main crystal grains including calcium and/or strontium, and zirconium; and an additive component including lithium, the internal electrodes include copper, and the dielectric layers have lithium concentrations with a standard deviation of about 1.03 atomic percent or less in the thickness direction.
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公开(公告)号:US12278051B2
公开(公告)日:2025-04-15
申请号:US18122841
申请日:2023-03-17
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yuu Mikami , Tatsuya Izumi
Abstract: A multilayer ceramic capacitor includes a multilayer body including laminated dielectric layers, internal electrode layers on the dielectric layers, first and second main surfaces opposed to each other in a lamination direction, first and second lateral surfaces opposed to each other in a width direction orthogonal or substantially orthogonal to the lamination direction, and first and second end surfaces opposed to each other in a length direction orthogonal or substantially orthogonal to the lamination direction and the width direction, and a first external electrode on the first main surface and a second external electrode on the second main surface, in which a portion or all of the internal electrode layers are not connected to any of the first external electrode or the second external electrode.
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公开(公告)号:US11710600B2
公开(公告)日:2023-07-25
申请号:US16987684
申请日:2020-08-07
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tatsuya Izumi , Tomotaka Hirata
IPC: H01G4/30 , H01G4/012 , H01G4/008 , H01G4/12 , C04B35/057
CPC classification number: H01G4/30 , C04B35/057 , H01G4/008 , H01G4/012 , H01G4/1236 , C04B2235/3206 , C04B2235/3208
Abstract: A multilayer electronic component that includes a stacked body having therein a plurality of dielectric layers including a CZ-based perovskite phase and an element M1, a plurality of internal electrode layers including Cu, and an interface layer including the element M1 in at least a portion of an interface with the plurality of internal electrode layers. Element M1 is an element that has a binding energy between CZ and Cu via the element M1 of less than or equal to −9.8 eV by first-principles calculation using a pseudopotential method. When amounts of elements included in the dielectric layers are expressed as parts by mol, a ratio m1 of an amount of the element M1 to an amount of the Zr in the interface layer is 0.03≤m1≤0.25.
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公开(公告)号:US20210065989A1
公开(公告)日:2021-03-04
申请号:US16987684
申请日:2020-08-07
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tatsuya Izumi , Tomotaka Hirata
IPC: H01G4/30 , H01G4/012 , H01G4/008 , H01G4/12 , C04B35/057
Abstract: A multilayer electronic component that includes a stacked body having therein a plurality of dielectric layers including a CZ-based perovskite phase and an element M1, a plurality of internal electrode layers including Cu, and an interface layer including the element M1 in at least a portion of an interface with the plurality of internal electrode layers. Element M1 is an element that has a binding energy between CZ and Cu via the element M1 of less than or equal to −9.8 eV by first-principles calculation using a pseudopotential method. When amounts of elements included in the dielectric layers are expressed as parts by mol, a ratio m1 of an amount of the element M1 to an amount of the Zr in the interface layer is 0.03≤m1≤0.25.
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