公开(公告)号：US20240290546A1

公开(公告)日：2024-08-29

申请号：US18657890

申请日：2024-05-08

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Keita KITAHARA ,  Yuta SAITO ,  Noriyuki OOKAWA ,  Riyousuke AKAZAWA ,  Takefumi TAKAHASHI ,  Masahiro WAKASHIMA ,  Yuta KUROSU ,  Akito MORI

IPC: H01G4/30 ,  H01G4/008 ,  H01G4/012 ,  H01G4/12

CPC classification number: H01G4/30 ,  H01G4/008 ,  H01G4/012 ,  H01G4/1218

Abstract: In a multilayer ceramic capacitor, a positional deviation in a lamination direction between end portions in a width direction intersecting the lamination direction and a length direction, of two of internal electrode layers adjacent to each other in the lamination direction, is about 5 μm or less. A connection ratio N1/N0 at the middle portion thereof, and a connection ratio N2/N0 at the end portion thereof are about 90% or more, respectively, and a difference between N1/N0 and N2/N0 is about 10% or less.

公开(公告)号：US20240029958A1

公开(公告)日：2024-01-25

申请号：US18375681

申请日：2023-10-02

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Keita KITAHARA ,  Yuta SAITO ,  Noriyuki OOKAWA ,  Riyousuke AKAZAWA ,  Takefumi TAKAHASHI ,  Masahiro WAKASHIMA ,  Yuta KUROSU ,  Akito MORI

IPC: H01G4/30 ,  H01G4/12 ,  H01G4/008 ,  H01G4/012

CPC classification number: H01G4/30 ,  H01G4/1218 ,  H01G4/008 ,  H01G4/012

Abstract: A multilayer ceramic capacitor includes a multilayer body including an inner layer portion including dielectric layers and internal electrode layers alternately laminated therein, two outer layer portions respectively provided on both sides of the inner layer portion in a lamination direction, and two side gap portions respectively provided on both side surfaces of the inner layer portion and the outer layer portions, in a width direction intersecting the lamination direction, and external electrodes respectively provided on both end surfaces of the multilayer body in a length direction intersecting the lamination direction and the width direction, and each connected to the internal electrode layers, wherein nickel and magnesium are segregated between the side gap portions and the outer layer portions.

公开(公告)号：US20230360856A1

公开(公告)日：2023-11-09

申请号：US18218303

申请日：2023-07-05

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Keita KITAHARA ,  Yuta SAITO ,  Noriyuki OOKAWA ,  Riyousuke AKAZAWA ,  Takefumi TAKAHASHI ,  Masahiro WAKASHIMA ,  Yuta KUROSU ,  Akito MORI

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/008 ,  H01G4/12

CPC classification number: H01G4/30 ,  H01G4/012 ,  H01G4/008 ,  H01G4/1218

Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers alternately laminated therein, and external electrode layers respectively provided on both end surfaces of the multilayer body in a length direction intersecting a lamination direction, and each connected to the internal electrode layers, the external electrode layers each further including a base electrode layer including a first region, a second region, and a third region divided therein, in order from the multilayer body. The first region includes a metal included in the internal electrode layers in a higher amount than the second region and the third region, the second region includes glass in a higher amount than the first region and the third region, and the third region includes copper in a higher amount than the first region and the second region.

公开(公告)号：US20220139633A1

公开(公告)日：2022-05-05

申请号：US17495854

申请日：2021-10-07

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Masahiro WAKASHIMA ,  Yuta SAITO ,  Akito MORI

IPC: H01G4/38 ,  H01G4/30 ,  H01G4/248 ,  H01G4/232 ,  H01G4/12

Abstract: A multilayer ceramic capacitor package accommodating multilayer ceramic capacitors includes a carrier tape that is elongated and includes recess pockets at equal or substantially equal intervals in a longitudinal direction, a cover tape that is elongated and attached to the carrier tape to cover an opening of each of the pockets, and the multilayer ceramic capacitors respectively accommodated in the pockets. In the multilayer ceramic capacitor package, in adjacent multilayer ceramic capacitors, a difference in densities of surfaces on an opening side of the pockets is about 0% or more and about 4% or less.

公开(公告)号：US20250166925A1

公开(公告)日：2025-05-22

申请号：US19027935

申请日：2025-01-17

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yuta KUROSU ,  Yuta SAITO ,  Masahiro WAKASHIMA ,  Daiki FUKUNAGA ,  Yu TSUTSUI

IPC: H01G4/30 ,  H01G4/008 ,  H01G4/12 ,  H01G4/232 ,  H01G4/248

Abstract: A multilayer ceramic capacitor includes a second alloy portion including one metal element provided in a greatest amount among metal elements of an internal electrode layer, and one or more metal elements among a metal group including Sn, In, Ga, Zn, Bi, Pb, Cu, Ag, Pd, Pt, Ph, Ir, Ru, Os, Fe, V, and Y is provided between a second dielectric ceramic layer and a first internal electrode layer, and between a second dielectric ceramic layer and a second internal electrode layer, respectively.

公开(公告)号：US20220148812A1

公开(公告)日：2022-05-12

申请号：US17495853

申请日：2021-10-07

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yu TSUTSUI ,  Yuta KUROSU ,  Daiki FUKUNAGA ,  Yuta SAITO ,  Masahiro WAKASHIMA

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/12 ,  H01G4/008 ,  H01G13/00 ,  C04B35/468

Abstract: A method of manufacturing a multilayer ceramic capacitor includes printing an internal electrode pattern on a dielectric layer, forming a dielectric pattern in a region other than a region in which the internal electrode pattern is printed, laminating dielectric layers to form a multilayer body, exposing the internal electrode pattern and the dielectric pattern from a side surface of the multilayer body, removing at least a portion of the exposed dielectric pattern, and forming a dielectric gap layer on the side surface.

公开(公告)号：US20220102079A1

公开(公告)日：2022-03-31

申请号：US17487385

申请日：2021-09-28

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Keita KITAHARA ,  Yuta SAITO ,  Noriyuki OOKAWA ,  Riyousuke AKAZAWA ,  Takefumi TAKAHASHI ,  Masahiro WAKASHIMA ,  Yuta KUROSU ,  Akito MORI

IPC: H01G4/30 ,  H01G4/008 ,  H01G4/12 ,  H01G4/012

Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers alternately laminated therein, and external electrode layers respectively provided on both end surfaces of the multilayer body in a length direction intersecting a lamination direction, and each connected to the internal electrode layers, the external electrode layers each further including a base electrode layer including a first region, a second region, and a third region divided therein, in order from the multilayer body. The first region includes a metal included in the internal electrode layers in a higher amount than the second region and the third region, the second region includes glass in a higher amount than the first region and the third region, and the third region includes copper in a higher amount than the first region and the second region.

公开(公告)号：US20210202179A1

公开(公告)日：2021-07-01

申请号：US17131896

申请日：2020-12-23

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yuta SAITO ,  Yuta KUROSU ,  Masahiro WAKASHIMA ,  Daiki FUKUNAGA ,  Yu TSUTSUI

IPC: H01G4/30 ,  H01G4/232 ,  H01G4/12 ,  H01G4/248

Abstract: In a multilayer ceramic capacitor, a first segregation defined by at least one metal element selected from a group consisting of Mg, Mn, and Si is present at each of an end in a length direction of a first internal electrode layer not connected to a second external electrode and an end in a length direction of a second internal electrode layer not connected to a first external electrode. A second segregation defined by at least one metal element selected from a group consisting of Mg, Mn, and Si is present at each of an end of the first internal electrode layer in a width direction and an end of the second internal electrode layer in the width direction.

公开(公告)号：US20210202178A1

公开(公告)日：2021-07-01

申请号：US17131891

申请日：2020-12-23

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yuta KUROSU ,  Yuta SAITO ,  Masahiro WAKASHIMA ,  Daiki FUKUNAGA ,  Yu TSUTSUI

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/12 ,  H01G4/008 ,  C04B35/468

Abstract: In a multilayer ceramic capacitor, an intersection of an interface is defined by a second dielectric ceramic layer, a first internal electrode layer or a second internal electrode layer, and a third dielectric ceramic layer, on a plane including a length direction and a width direction, the second dielectric ceramic layer and the third dielectric ceramic layer include a near intersection region at or near the intersection, and an average particle size of dielectric particles in the near intersection region is smaller than average particle sizes of dielectric particles in the first dielectric ceramic layer, the second dielectric ceramic layer, and the third dielectric ceramic layer.

公开(公告)号：US20180268999A1

公开(公告)日：2018-09-20

申请号：US15916386

申请日：2018-03-09

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kohei SHIMADA ,  Akio MASUNARI ,  Yuta SAITO ,  Shunsuke ABE ,  Tomoo YUGUCHI

IPC: H01G4/30 ,  H01G4/12 ,  H01G4/008

CPC classification number: H01G4/30 ,  H01G4/008 ,  H01G4/012 ,  H01G4/1227 ,  H01G4/1245 ,  H01G4/232

Abstract: A multilayer ceramic capacitor includes a laminate with a rectangular or substantially rectangular parallelepiped shape and including dielectric layers, first internal electrode layers, and second internal electrode layers that are laminated; a first external electrode connected with the first internal electrode layers; and a second external electrode connected with the second internal electrode layers. Each of the first internal electrode layers or the second internal electrode layers has a coverage in a central portion in a W direction that is lower than a coverage within about 30.000 μm from an end portion in the W direction, and has a shifting amount in the W direction of about 0.000 μm or more and about 10.000 μm or less.