-
公开(公告)号:US20190019766A1
公开(公告)日:2019-01-17
申请号:US15750614
申请日:2016-08-03
Inventor: Yohei Hori , Yongxun Liu , Shinichi Ouchi , Tetsuji Yasuda , Meishoku Masahara , Toshifumi Irisawa , Kazuhiko Endo , Hiroyuki Ota , Tatsuro Maeda , Hanpei Koike , Yasuhiro Ogasahara , Toshihiro Katashita , Koichi Fukuda
IPC: H01L23/00 , H01L25/065 , H01L23/522
Abstract: A semiconductor device 100 of the present invention includes a front end and back ends A and B, each including a plurality of layers. Further, in the plurality of layers of the back end B, (i) circuits 22, 23, and 24 having a security function are provided in at least one layer having a wiring pitch of 100 nm or more, (ii) a circuit having a security function is provided in at least one wiring layer in M5 or higher level (M5, M6, M7, . . . ), (iii) a circuit having a security function is provided in at least one layer, for which immersion ArF exposure does not need to be used, or (iv) a circuit having a security function is provided in at least one layer that is exposed by using an exposure wavelength of 200 nm or more.
-
公开(公告)号:US10402248B2
公开(公告)日:2019-09-03
申请号:US15507105
申请日:2015-08-20
Inventor: Yohei Hori , Kazukuni Kobara , Toshihiro Katashita , Toshihiro Matsui
Abstract: A method and a program capable of controlling an error rate of device-specific information are provided. Provided is the method for controlling an error rate of device-specific information, including a step S1 of: inputting each of i (i is an arbitrary natural number) challenges, j times (j is an arbitrary natural number), into a PUF mounted chip; leaving j responses intact (j′=j) or processing j responses into j′ pieces (0
-
公开(公告)号:US20170255503A1
公开(公告)日:2017-09-07
申请号:US15507105
申请日:2015-08-20
Inventor: Yohei Hori , Kazukuni Kobara , Toshihiro Katashita , Toshihiro Matsui
IPC: G06F11/07 , H03K19/003
CPC classification number: G06F11/076 , G06F11/0736 , G06F11/079 , G09C1/00 , H03K19/003 , H04L9/10 , H04L9/32
Abstract: A method and a program capable of controlling an error rate of device-specific information are provided. Provided is the method for controlling an error rate of device-specific information, including a step S1 of: inputting each of i (i is an arbitrary natural number) challenges, j times (j is an arbitrary natural number), into a PUF mounted chip; leaving j responses intact (j′=j) or processing j responses into j′ pieces (0
-
-