DEVICE SIMULATION METHOD AND DEVICE SIMULATION SYSTEM FOR TUNNEL FET, AND COMPACT MODEL DESIGN METHOD AND COMPACT MODEL FOR TUNNEL FET
    2.
    发明申请
    DEVICE SIMULATION METHOD AND DEVICE SIMULATION SYSTEM FOR TUNNEL FET, AND COMPACT MODEL DESIGN METHOD AND COMPACT MODEL FOR TUNNEL FET 审中-公开
    隧道场效应管的装置仿真方法及装置仿真系统及隧道式场效应管的紧凑型设计方法及紧凑型

    公开(公告)号:US20140288898A1

    公开(公告)日:2014-09-25

    申请号:US14036605

    申请日:2013-09-25

    Inventor: Koichi Fukuda

    CPC classification number: G06F17/5036

    Abstract: A tunnel path of the tunnel FET at a source-gate overlap portion is divided into a vertical path vertical to the source-gate overlap portion and a horizontal path extending to a drain in a horizontal direction along a channel interface. A tunnel distance computation section obtains a tunnel distance for each position of a nonlocal electric field band-to-band tunnel, using first and second bends of the mid-gap potential, which are previously stored approximate functions of the mid-gap potential on the vertical and horizontal paths, respectively. A carrier generation rate computation section computes a carrier generation rate due to band-to-band tunneling, based on the tunnel distance at each position of the nonlocal electric field band-to-band tunnel and a band gap.

    Abstract translation: 源极 - 栅极重叠部分处的隧道FET的隧道路径被划分成垂直于源极 - 栅极重叠部分的垂直路径和沿着沟道界面延伸到水平方向的漏极的水平路径。 隧道距离计算部分使用中间间隙电位的第一和第二弯曲来获得非本地电场带对带隧道的每个位置的隧道距离,这是先前存储的中间间隙电位的近似函数 垂直和水平路径。 载波生成速率计算部,基于非局部带电带通道的各个位置的隧道距离和带隙,计算由频带隧穿引起的载波生成率。

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