公开(公告)号：US10402937B2

公开(公告)日：2019-09-03

申请号：US15857330

申请日：2017-12-28

Applicant: NVIDIA Corporation

Inventor： Rouslan L. Dimitrov ,  Kirill A. Dmitriev ,  Andrei Khodakovsky ,  Tzyywei Hwang ,  Wishwesh Anil Gandhi ,  Lacky Vasant Shah

IPC: G06T1/60 ,  G06T15/00 ,  G06F12/1009 ,  G06T1/20

Abstract: A method for rendering graphics frames allocates rendering work to multiple graphics processing units (GPUs) that are configured to allow access to pages of data stored in locally attached memory of a peer GPU. The method includes the steps of generating, by a first GPU coupled to a first memory circuit, one or more first memory access requests to render a first primitive for a first frame, where at least one of the first memory access requests targets a first page of data that physically resides within a second memory circuit coupled to a second GPU. The first GPU requests the first page of data through a first data link coupling the first GPU to the second GPU and a register circuit within the first GPU accumulates an access request count for the first page of data. The first GPU notifies a driver that the access request count has reached a specified threshold.

公开(公告)号：US20190206018A1

公开(公告)日：2019-07-04

申请号：US15879377

申请日：2018-01-24

Applicant: NVIDIA Corporation

Inventor： Andrei Khodakovsky ,  Kirill A. Dmitriev ,  Rouslan L. Dimitrov ,  Tzyywei Hwang ,  Wishwesh Anil Gandhi ,  Lacky Vasant Shah

IPC: G06T1/20 ,  G06T1/60 ,  G06T15/00

CPC classification number: G06T1/20 ,  G06T1/60 ,  G06T15/005 ,  G06T2200/24 ,  G06T2210/52

Abstract: One or more copy commands are scheduled for locating one or more pages of data in a local memory of a graphics processing unit (GPU) for more efficient access to the pages of data during rendering. A first processing unit that is coupled to a first GPU receives a notification that an access request count has reached a specified threshold. The first processing unit schedules a copy command to copy the first page of data to a first memory circuit of the first GPU from a second memory circuit of the second GPU. The copy command is included within a GPU command stream.

公开(公告)号：US09734548B2

公开(公告)日：2017-08-15

申请号：US14012308

申请日：2013-08-28

Applicant: NVIDIA CORPORATION

Inventor： Ziyad S. Hakura ,  Rouslan Dimitrov ,  Emmett M. Kilgariff ,  Andrei Khodakovsky

IPC: G06T1/60 ,  G06T15/00 ,  G06F12/0875 ,  G06F12/0897

CPC classification number: G06T1/60 ,  G06F12/0875 ,  G06F12/0897 ,  G06F2212/1016 ,  G06F2212/1028 ,  G06F2212/401 ,  G06F2212/455 ,  G06F2212/601 ,  G06T11/40 ,  G06T15/005 ,  G09G2360/121

Abstract: One embodiment of the present invention includes techniques for adaptively sizing cache tiles in a graphics system. A device driver associated with a graphics system sets a cache tile size associated with a cache tile to a first size. The detects a change from a first render target configuration that includes a first set of render targets to a second render target configuration that includes a second set of render targets. The device driver sets the cache tile size to a second size based on the second render target configuration. One advantage of the disclosed approach is that the cache tile size is adaptively sized, resulting in fewer cache tiles for less complex render target configurations. Adaptively sizing cache tiles leads to more efficient processor utilization and reduced power requirements. In addition, a unified L2 cache tile allows dynamic partitioning of cache memory between cache tile data and other data.

公开(公告)号：US20150109315A1

公开(公告)日：2015-04-23

申请号：US14061693

申请日：2013-10-23

Applicant: NVIDIA Corporation

Inventor： Amanpreet Grewal ,  Andrei Khodakovsky ,  Yu Denny Dong ,  Henry Packard Moreton ,  Naveen Leekha

IPC: G06T1/60 ,  G06F12/10

CPC classification number: G06F12/1009 ,  G06F12/0207 ,  G06F2212/657 ,  G06T15/005 ,  G06T15/04

Abstract: A system, method, and computer program product are provided for mapping tiles to physical memory locations. In use, a plurality of virtual tiles associated with a texture is identified. Additionally, a request to perform a mapping of the plurality of virtual tiles to one or more physical memory locations is received. Further, the plurality of virtual tiles is mapped to the one or more physical memory locations, utilizing a page table.

Abstract translation: 提供了一种系统，方法和计算机程序产品，用于将瓦片映射到物理内存位置。 在使用中，识别与纹理相关联的多个虚拟瓦片。 另外，接收执行将多个虚拟瓦片映射到一个或多个物理存储器位置的请求。 此外，利用页表将多个虚拟瓦片映射到一个或多个物理存储器位置。

公开(公告)号：US20150070380A1

公开(公告)日：2015-03-12

申请号：US14024555

申请日：2013-09-11

Applicant: NVIDIA Corporation

Inventor： Eric B. Lum ,  Jeffrey Alan Bolz ,  Rui Manuel Bastos ,  Andrei Khodakovsky ,  Christian Johannes Amsinck ,  Bengt-Olaf Schneider

IPC: G06T15/50

CPC classification number: G06T15/503 ,  G06T15/005

Abstract: A system, method, and computer program product are provided for using compression with programmable sample locations, where the compression is a function of the programmable sample locations. The method includes the steps of storing a first value specifying a programmed sample location within a pixel in a sample pattern table and storing, in a memory, geometric surface parameters corresponding to a first attribute at the programmed sample location within a first pixel of a display surface. An instruction to store a second value specifying the programmed sample location within the pixel in the sample pattern table is received. The attribute is reconstructed based on the geometric surface parameters and the first value.

Abstract translation: 提供了一种用于使用具有可编程样本位置的压缩的系统，方法和计算机程序产品，其中压缩是可编程样本位置的函数。 该方法包括以下步骤：将指定编程样本位置的第一值存储在样本图案表中的像素内，并将其存储在存储器中，并在存储器中存储与显示器的第一像素内的编程样本位置处的第一属性对应的几何表面参数 表面。 接收用于存储指定样本图案表中的像素内的编程样本位置的第二值的指令。 基于几何表面参数和第一个值重建属性。

公开(公告)号：US10430915B2

公开(公告)日：2019-10-01

申请号：US15879377

申请日：2018-01-24

Applicant: NVIDIA Corporation

Inventor： Andrei Khodakovsky ,  Kirill A. Dmitriev ,  Rouslan L. Dimitrov ,  Tzyywei Hwang ,  Wishwesh Anil Gandhi ,  Lacky Vasant Shah

IPC: G06T1/60 ,  G06T1/20 ,  G06T15/00

Abstract: One or more copy commands are scheduled for locating one or more pages of data in a local memory of a graphics processing unit (GPU) for more efficient access to the pages of data during rendering. A first processing unit that is coupled to a first GPU receives a notification that an access request count has reached a specified threshold. The first processing unit schedules a copy command to copy the first page of data to a first memory circuit of the first GPU from a second memory circuit of the second GPU. The copy command is included within a GPU command stream.

公开(公告)号：US20190206023A1

公开(公告)日：2019-07-04

申请号：US15857330

申请日：2017-12-28

Applicant: NVIDIA Corporation

Inventor： Rouslan L. Dimitrov ,  Kirill A. Dmitriev ,  Andrei Khodakovsky ,  Tzyywei Hwang ,  Wishwesh Anil Gandhi ,  Lacky Vasant Shah

IPC: G06T1/60 ,  G06T1/20 ,  G06F12/1009 ,  G06T15/00

CPC classification number: G06T1/60 ,  G06F9/44 ,  G06F12/1009 ,  G06T1/20 ,  G06T15/005

Abstract: A method for rendering graphics frames allocates rendering work to multiple graphics processing units (GPUs) that are configured to allow access to pages of data stored in locally attached memory of a peer GPU. The method includes the steps of generating, by a first GPU coupled to a first memory circuit, one or more first memory access requests to render a first primitive for a first frame, where at least one of the first memory access requests targets a first page of data that physically resides within a second memory circuit coupled to a second GPU. The first GPU requests the first page of data through a first data link coupling the first GPU to the second GPU and a register circuit within the first GPU accumulates an access request count for the first page of data. The first GPU notifies a driver that the access request count has reached a specified threshold.

公开(公告)号：US10083036B2

公开(公告)日：2018-09-25

申请号：US14045361

申请日：2013-10-03

Applicant: NVIDIA CORPORATION

Inventor： Ziyad S. Hakura ,  Cynthia Ann Edgeworth Allison ,  Dale L. Kirkland ,  Andrei Khodakovsky ,  Jeffrey A. Bolz

IPC: G09G5/36 ,  G06F9/38 ,  G06T15/00 ,  G06T15/40 ,  G06T1/20 ,  G06T1/60 ,  G09G5/395 ,  G09G5/00 ,  G06T15/50 ,  G06F12/0808 ,  G06F12/0875 ,  G06F9/44 ,  G06T15/80

CPC classification number: G06T1/20 ,  G06F9/38 ,  G06F9/44 ,  G06F12/0808 ,  G06F12/0875 ,  G06F2212/302 ,  G06T1/60 ,  G06T15/005 ,  G06T15/405 ,  G06T15/503 ,  G06T15/80 ,  G06T17/20 ,  G09G5/003 ,  G09G5/395 ,  Y02D10/13

Abstract: One embodiment of the present invention sets forth a technique for managing graphics processing resources in a tile-based architecture. The technique includes storing a release packet associated with a graphics processing resource in a buffer and initiating a replay of graphics primitives stored in the buffer and associated with the graphics processing resource. The technique further includes, for each tile included in a plurality of tiles and processed during the replay, reading the release packet and determining whether the tile is a last tile processed during the replay. The technique further includes determining not to transmit the release packet to a screen-space pipeline and continuing to read graphics data stored in the buffer if the tile is not the last tile to be processed during the replay, or transmitting the release packet to the screen-space pipeline if the tile is the last tile to be processed during the replay.

公开(公告)号：US09230362B2

公开(公告)日：2016-01-05

申请号：US14024555

申请日：2013-09-11

Applicant: NVIDIA Corporation

Inventor： Eric B. Lum ,  Jeffrey Alan Bolz ,  Rui Manuel Bastos ,  Andrei Khodakovsky ,  Christian Johannes Amsinck ,  Bengt-Olaf Schneider

IPC: G06T15/50 ,  G06T15/00

CPC classification number: G06T15/503 ,  G06T15/005

Abstract: A system, method, and computer program product enable compression with programmable sample locations, where the compression is a function of the programmable sample locations. The method includes the steps of storing a first value specifying a programmed sample location within a pixel in a sample pattern table and storing, in a memory, geometric surface parameters corresponding to a first attribute at the programmed sample location within a first pixel of a display surface. An instruction to store a second value specifying the programmed sample location within the pixel in the sample pattern table is received. The attribute is reconstructed based on the geometric surface parameters and the first value.

Abstract translation: 系统，方法和计算机程序产品使用可编程样本位置进行压缩，其中压缩是可编程样本位置的函数。 该方法包括以下步骤：将指定编程样本位置的第一值存储在样本图案表中的像素内，并将其存储在存储器中，并在存储器中存储与显示器的第一像素内的编程样本位置处的第一属性对应的几何表面参数 表面。 接收用于存储指定样本图案表中的像素内的编程样本位置的第二值的指令。 基于几何表面参数和第一个值重建属性。

公开(公告)号：US10032242B2

公开(公告)日：2018-07-24

申请号：US14043411

申请日：2013-10-01

Applicant: NVIDIA Corporation

Inventor： Ziyad S. Hakura ,  Jeffrey A. Bolz ,  Amanpreet Grewal ,  Matthew Johnson ,  Andrei Khodakovsky

IPC: G06T1/20

Abstract: A method for managing bind-render-target commands in a tile-based architecture. The method includes receiving a requested set of bound render targets and a draw command. The method also includes, upon receiving the draw command, determining whether a current set of bound render targets includes each of the render targets identified in the requested set. The method further includes, if the current set does not include each render target identified in the requested set, then issuing a flush-tiling-unit-command to a parallel processing subsystem, modifying the current set to include each render target identified in the requested set, and issuing bind-render-target commands identifying the requested set to the tile-based architecture for processing. The method further includes, if the current set of render targets includes each render target identified in the requested set, then not issuing the flush-tiling-unit-command.