公开(公告)号：US20210073125A1

公开(公告)日：2021-03-11

申请号：US16562361

申请日：2019-09-05

Applicant: NVIDIA CORPORATION

Inventor： Jerome F. DULUK, JR. ,  Gregory Scott PALMER ,  Jonathon Stuart Ramsey EVANS ,  Shailendra SINGH ,  Samuel H. DUNCAN ,  Wishwesh Anil GANDHI ,  Lacky V. SHAH ,  Eric ROCK ,  Feiqi SU ,  James Leroy DEMING ,  Alan MENEZES ,  Pranav VAIDYA ,  Praveen JOGINIPALLY ,  Timothy John PURCELL ,  Manas MANDAL

IPC: G06F12/06

Abstract: A parallel processing unit (PPU) can be divided into partitions. Each partition is configured to operate similarly to how the entire PPU operates. A given partition includes a subset of the computational and memory resources associated with the entire PPU. Software that executes on a CPU partitions the PPU for an admin user. A guest user is assigned to a partition and can perform processing tasks within that partition in isolation from any other guest users assigned to any other partitions. Because the PPU can be divided into isolated partitions, multiple CPU processes can efficiently utilize PPU resources.

公开(公告)号：US20210073025A1

公开(公告)日：2021-03-11

申请号：US16562359

申请日：2019-09-05

Applicant: NVIDIA CORPORATION

Inventor： Jerome F. DULUK, JR. ,  Gregory Scott PALMER ,  Jonathon Stuart Ramsey EVANS ,  Shailendra SINGH ,  Samuel H. DUNCAN ,  Wishwesh Anil GANDHI ,  Lacky V. SHAH ,  Eric ROCK ,  Feiqi SU ,  James Leroy DEMING ,  Alan MENEZES ,  Pranav VAIDYA ,  Praveen JOGINIPALLY ,  Timothy John PURCELL ,  Manas MANDAL

IPC: G06F9/48 ,  G06F9/46 ,  G06T1/20

Abstract: A parallel processing unit (PPU) can be divided into partitions. Each partition is configured to operate similarly to how the entire PPU operates. A given partition includes a subset of the computational and memory resources associated with the entire PPU. Software that executes on a CPU partitions the PPU for an admin user. A guest user is assigned to a partition and can perform processing tasks within that partition in isolation from any other guest users assigned to any other partitions. Because the PPU can be divided into isolated partitions, multiple CPU processes can efficiently utilize PPU resources.

公开(公告)号：US20230288471A1

公开(公告)日：2023-09-14

申请号：US17691759

申请日：2022-03-10

Applicant: NVIDIA Corporation

Inventor： Jerome F. DULUK ,  Gentaro HIROTA ,  Ronny KRASHINSKY ,  Greg PALMER ,  Jeff TUCKEY ,  Kaushik NADADHUR ,  Philip Browning JOHNSON ,  Praveen JOGINIPALLY

IPC: G01R31/28

CPC classification number: G01R31/2884 ,  G01R31/2889 ,  G01R31/2896 ,  G01R31/2839

Abstract: Processing hardware of a processor is virtualized to provide a façade between a consistent programming interface and specific hardware instances. Hardware processor components can be permanently or temporarily disabled when not needed to support the consistent programming interface and/or to balance hardware processing across a hardware arrangement such as an integrated circuit. Executing software can be migrated from one hardware arrangement to another without need to reset the hardware.

公开(公告)号：US20210073042A1

公开(公告)日：2021-03-11

申请号：US16562367

申请日：2019-09-05

Applicant: NVIDIA CORPORATION

Inventor： Jerome F. DULUK, Jr. ,  Gregory Scott PALMER ,  Jonathon Stuart Ramsey EVANS ,  Shailendra SINGH ,  Samuel H. DUNCAN ,  Wishwesh Anil GANDHI ,  Lacky V. SHAH ,  Eric ROCK ,  Feiqi SU ,  James Leroy DEMING ,  Alan MENEZES ,  Pranav VAIDYA ,  Praveen JOGINIPALLY ,  Timothy John PURCELL ,  Manas MANDAL

IPC: G06F9/50 ,  G06F9/38 ,  G06F1/04 ,  G06F1/3296

Abstract: A parallel processing unit (PPU) can be divided into partitions. Each partition is configured to operate similarly to how the entire PPU operates. A given partition includes a subset of the computational and memory resources associated with the entire PPU. Software that executes on a CPU partitions the PPU for an admin user. A guest user is assigned to a partition and can perform processing tasks within that partition in isolation from any other guest users assigned to any other partitions. Because the PPU can be divided into isolated partitions, multiple CPU processes can efficiently utilize PPU resources.

公开(公告)号：US20230289212A1

公开(公告)日：2023-09-14

申请号：US17691808

申请日：2022-03-10

Applicant: NVIDIA Corporation

Inventor： Jerome F. DULUK, JR. ,  Gentaro HIROTA ,  Ronny KRASHINSKY ,  Greg PALMER ,  Jeff TUCKEY ,  Kaushik NADADHUR ,  Philip Browning JOHNSON ,  Praveen JOGINIPALLY

IPC: G06F9/48 ,  G06F9/46

CPC classification number: G06F9/4856 ,  G06F9/461

Abstract: Processing hardware of a processor is virtualized to provide a façade between a consistent programming interface and specific hardware instances. Hardware processor components can be permanently or temporarily disabled when not needed to support the consistent programming interface and/or to balance hardware processing across a hardware arrangement such as an integrated circuit. Executing software can be migrated from one hardware arrangement to another without need to reset the hardware.

公开(公告)号：US20210157651A1

公开(公告)日：2021-05-27

申请号：US17164718

申请日：2021-02-01

Applicant: NVIDIA CORPORATION

Inventor： Jerome F. DULUK, Jr. ,  Gregory Scott PALMER ,  Jonathon Stuart Ramsay EVANS ,  Shailendra SINGH ,  Samuel H. DUNCAN ,  Wishwesh Anil GANDHI ,  Lacky V. SHAH ,  Eric ROCK ,  Feiqi SU ,  James Leroy DEMING ,  Alan MENEZES ,  Pranav VAIDYA ,  Praveen JOGINIPALLY ,  Timothy John PURCELL ,  Manas MANDAL

IPC: G06F9/50 ,  G06T1/20 ,  G06F9/455 ,  G06F9/48

Abstract: A parallel processing unit (PPU), operating in a traditional processing environment or in a virtualized processing environment, can be divided into partitions. Each partition is configured to operate similarly to how the entire PPU operates. A given partition includes a subset of the computational and memory resources associated with the entire PPU. Software that executes on a CPU partitions the PPU for an admin user. A guest user is assigned to a partition and can perform processing tasks within that partition in isolation from any other guest users assigned to any other partitions. Because the PPU can be divided into isolated partitions, multiple CPU processes can efficiently utilize PPU resources.

公开(公告)号：US20210073035A1

公开(公告)日：2021-03-11

申请号：US16562364

申请日：2019-09-05

Applicant: NVIDIA CORPORATION

Inventor： Jerome F. DULUK, Jr. ,  Gregory Scott PALMER ,  Jonathon Stuart Ramsey EVANS ,  Shailendra SINGH ,  Samuel H. DUNCAN ,  Wishwesh Anil GANDHI ,  Lacky V. SHAH ,  Eric ROCK ,  Feiqi SU ,  James Leroy DEMING ,  Alan MENEZES ,  Pranav VAIDYA ,  Praveen JOGINIPALLY ,  Timothy John PURCELL ,  Manas MANDAL

IPC: G06F9/50 ,  G06F9/46 ,  G06F9/38

Abstract: A parallel processing unit (PPU) can be divided into partitions. Each partition is configured to operate similarly to how the entire PPU operates. A given partition includes a subset of the computational and memory resources associated with the entire PPU. Software that executes on a CPU partitions the PPU for an admin user. A guest user is assigned to a partition and can perform processing tasks within that partition in isolation from any other guest users assigned to any other partitions. Because the PPU can be divided into isolated partitions, multiple CPU processes can efficiently utilize PPU resources.