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1.发明申请公开(公告)号：US20200051318A1
公开(公告)日：2020-02-13
申请号：US16101232
申请日：2018-08-10
Applicant: NVIDIA Corporation
Inventor： Greg MUTHLER , Ronald Charles BABICH, JR. , William Parsons NEWHALL, JR. , Peter NELSON , James ROBERTSON , John BURGESS
Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.
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2.发明公开公开(公告)号：US20240169655A1
公开(公告)日：2024-05-23
申请号：US18420449
申请日：2024-01-23
Applicant: NVIDIA Corporation
Inventor： Greg MUTHLER , Ronald Charles BABICH, JR. , William Parsons NEWHALL, Jr. , Peter NELSON , James ROBERTSON , John BURGESS
CPC classification number: G06T15/06 , G06F9/3877 , G06N5/046 , G06T1/20 , G06T1/60 , G06T17/005
Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.
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公开(公告)号：US20240087211A1
公开(公告)日：2024-03-14
申请号：US17941578
申请日：2022-09-09
Applicant: NVIDIA Corporation
Inventor： Greg MUTHLER , John BURGESS , Magnus ANDERSSON , Timo VIITANEN , Levi OLIVER
CPC classification number: G06T15/06 , G06T15/005 , G06T17/005
Abstract: An alternate root tree or graph structure for ray and path tracing enables dynamic instancing build time decisions to split any number of geometry acceleration structures in a manner that is developer transparent, nearly memory storage neutral, and traversal efficient. The resulting traversals only need to partially traverse the acceleration structure, which improves efficiency. One example use reduces the number of false positive instance acceleration structure to geometry acceleration structure transitions for many spatially separated instances of the same geometry.
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4.发明公开公开(公告)号：US20230237729A1
公开(公告)日：2023-07-27
申请号：US18129334
申请日：2023-03-31
Applicant: NVIDIA Corporation
Inventor： Greg MUTHLER , Tero KARRAS , Samuli LAINE , William Parsons NEWHALL, JR. , Ronald Charles BABICH, JR. , John BURGESS , Ignacio LLAMAS
IPC: G06T15/06
CPC classification number: G06T15/06
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
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5.发明申请公开(公告)号：US20200051317A1
公开(公告)日：2020-02-13
申请号：US16101206
申请日：2018-08-10
Applicant: NVIDIA Corporation
Inventor： Greg MUTHLER , Ronald Charles BABICH, JR. , William Parsons NEWHALL, JR. , Peter NELSON , Jim ROBERTSON , John BURGESS
Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20250118005A1
公开(公告)日：2025-04-10
申请号：US18911682
申请日：2024-10-10
Applicant: NVIDIA Corporation
Inventor： Greg MUTHLER , Tero Karras , Samuli Laine , William Parsons Newhall, JR. , Ronald Charles Babich, JR. , John Burgess , Ignacio Llamas
IPC: G06T15/06
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
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公开(公告)号：US20230410410A1
公开(公告)日：2023-12-21
申请号：US18239876
申请日：2023-08-30
Applicant: NVIDIA Corporation
Inventor： Samuli LAINE , Tero KARRAS , Greg MUTHLER , William Parsons Newhall, JR. , Ronald Charles BABACH, JR. , Ignacio LLAMAS , John BURGESS
CPC classification number: G06T15/06 , G06T1/20 , G06T15/005 , G06T2210/21
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.
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8.发明申请公开(公告)号：US20200160588A1
公开(公告)日：2020-05-21
申请号：US16749089
申请日：2020-01-22
Applicant: NVIDIA Corporation
Inventor： Greg MUTHLER , Tero KARRAS , Samuli LAINE , William Parsons NEWHALL, JR. , Ronald Charles BABICH, JR. , John BURGESS , Ignacio LLAMAS
IPC: G06T15/06
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
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公开(公告)号：US20200050550A1
公开(公告)日：2020-02-13
申请号：US16101109
申请日：2018-08-10
Applicant: NVIDIA Corporation
Inventor： Greg MUTHLER , Timo AILA , Tero KARRAS , Samuli LAINE , William Parsons NEWHALL , Ronald Charles BABICH , John BURGESS , Ignacio LLAMAS
IPC: G06F12/0875 , G06T15/06 , G06F17/30
Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.
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公开(公告)号：US20240355039A1
公开(公告)日：2024-10-24
申请号：US18761820
申请日：2024-07-02
Applicant: NVIDIA Corporation
Inventor： Samuli LAINE , Tero KARRAS , Timo AILA , Robert OHANNESSIAN , William Parsons NEWHALL, Jr. , Greg MUTHLER , Ian KWONG , Peter NELSON , John BURGESS
CPC classification number: G06T15/06 , G06T15/005
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.
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