Semiconductor device with an encircled electrode

    公开(公告)号:US10930747B2

    公开(公告)日:2021-02-23

    申请号:US16431056

    申请日:2019-06-04

    Applicant: NXP B.V.

    Abstract: An embodiment of a semiconductor device includes a first semiconductor region formed within a semiconductor substrate, a second semiconductor region formed within the semiconductor substrate, a first electrode coupled to the first semiconductor region, a second electrode coupled to the second semiconductor region and proximate the first electrode, wherein the second electrode is encircled by the first electrode. A third electrode may be coupled to the first electrode and the second semiconductor region. A fourth electrode may be coupled to the first semiconductor region and proximate the third electrode, wherein the fourth electrode may be coupled to the second electrode, and wherein the third electrode includes a shared portion of the first electrode.

    Bipolar Transistor
    4.
    发明申请
    Bipolar Transistor 有权
    双极晶体管

    公开(公告)号:US20160079345A1

    公开(公告)日:2016-03-17

    申请号:US14852385

    申请日:2015-09-11

    Applicant: NXP B.V.

    Abstract: A semiconductor device comprising a bipolar transistor and a method of making the same. A power amplifier including a bipolar transistor. The bipolar transistor includes a collector including a laterally extending drift region. The bipolar transistor also includes a base located above the collector. The bipolar transistor further includes an emitter located above the base. The bipolar transistor also includes a doped region having a conductivity type that is different to that of the collector. The doped region extends laterally beneath the collector to form a junction at a region of contact between the doped region and the collector. The doped region has a non-uniform lateral doping profile. A doping level of the doped region is highest in a part of the doped region closest to a collector-base junction of the bipolar transistor.

    Abstract translation: 一种包括双极晶体管的半导体器件及其制造方法。 一种功率放大器,包括双极晶体管。 双极晶体管包括具有横向延伸漂移区的集电极。 双极晶体管还包括位于集电极之上的基极。 双极晶体管还包括位于基极上方的发射极。 双极晶体管还包括具有不同于集电极的导电类型的掺杂区域。 掺杂区域在集电极下方横向延伸以在掺杂区域和集电极之间的接触区域处形成结。 掺杂区域具有非均匀的横向掺杂分布。 在最接近双极晶体管的集电极 - 基极结的掺杂区域的一部分中,掺杂区域的掺杂水平最高。

    SEMICONDUCTOR SWITCH DEVICE AND METHOD
    5.
    发明申请

    公开(公告)号:US20190019867A1

    公开(公告)日:2019-01-17

    申请号:US16002841

    申请日:2018-06-07

    Applicant: NXP B.V.

    Abstract: A semiconductor switch device and a method of making the same. The device includes a semiconductor substrate having a major surface. The device also includes a first semiconductor region located in the substrate beneath the major surface. The device includes an elongate gate located on the major surface. The device also includes a source region and a drain region located in the first semiconductor region adjacent respective first and second elongate edges of the gate. The device also includes electrical contacts for the source and drain regions. The contacts include at least two contacts located on either the source region or the drain region, which are spaced apart along a direction substantially parallel the elongate edges of the gate. The device further includes an isolation region located between the at least two contacts. The isolation region extends through the source/drain region from the major surface to the first semiconductor region.

    METHOD OF MAKING A SEMICONDUCTOR SWITCH DEVICE

    公开(公告)号:US20180218906A1

    公开(公告)日:2018-08-02

    申请号:US15886265

    申请日:2018-02-01

    Applicant: NXP B.V.

    Abstract: A method of making a semiconductor switch device. The method includes providing a semiconductor substrate having a major surface and a first semiconductor region having a first conductivity type located adjacent the major surface. The method also includes depositing a gate dielectric on the major surface. The method further includes implanting ions into the first semiconductor region through a mask positioned over the first semiconductor region, thereby to form a well region located in the first semiconductor region. The well region has a second conductivity type different to the first conductivity type. The method also includes depositing and patterning a gate electrode material on the gate dielectric to form a gate electrode located directly above the well region. The method further includes implanting ions into the first semiconductor region to form a source region and a drain region of the semiconductor switch device on either side of the gate electrode.

    Semiconductor devices with a mixed crystal region

    公开(公告)号:US11018230B1

    公开(公告)日:2021-05-25

    申请号:US16723311

    申请日:2019-12-20

    Applicant: NXP B.V.

    Abstract: An embodiment of a semiconductor device may include a semiconductor substrate, a first semiconductor region comprising a first material with a first polarity formed within the semiconductor substrate and a second semiconductor region comprising the first material with a second polarity formed within the semiconductor substrate and coupled to the first semiconductor region. In an embodiment, a semiconductor device may also include a first electrode coupled to the first semiconductor region, a second electrode coupled to the second semiconductor region, and a depletion region formed between the first semiconductor region and the second semiconductor region. The depletion region may include a mixed crystal region that includes a mixed crystal alloy of the first material and a second material, wherein the mixed crystal region has a lower bandgap energy than a bandgap energy of the first material.

    Method of making a semiconductor switch device

    公开(公告)号:US10431666B2

    公开(公告)日:2019-10-01

    申请号:US15935306

    申请日:2018-03-26

    Applicant: NXP B.V.

    Abstract: A semiconductor switch device and a method of making the same. The method includes providing a semiconductor substrate having a major surface and a first semiconductor region having a first conductivity type. The method further includes implanting ions into the first semiconductor region through an opening in a mask positioned over the first semiconductor region, thereby to form a well region located in the first semiconductor region, the well region having a second conductivity type different to the first conductivity type. The method also includes depositing and patterning a gate electrode material on a gate dielectric to form a gate electrode located directly above the well region. The method further includes performing ion implantation to form a source region located in the well region on a first side of the gate, and to form a drain region located outside the well region on a second side of the gate.

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