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公开(公告)号：US11272363B2
公开(公告)日：2022-03-08
申请号：US16829401
申请日：2020-03-25
Applicant: NXP B.V.
Inventor： Marcel Medwed , Pim Vullers , Joost Roland Renes , Stefan Lemsitzer
IPC: H04L29/06 , H04L9/32 , H04W12/06 , H04W12/037
Abstract: A method is provided for authenticating one device to another device. In the method, a first device proves to a second device that a first credential comprising multiple first attributes is valid. The second device proves to the first device that a second credential comprising multiple second attributes is valid. The first device reveals a first attribute of the multiple first attributes to the second device. The second device verifies the first attribute and decides whether to continue revealing attributes. If continuing, the second device reveals to the first device a first attribute of the multiple second attributes. The first device verifies the first attribute of the multiple second attributes. The first device decides whether to continue revealing attributes. Attributes can be revealed until one of the first or second devices end the method or until no attributes of the multiple first and second attributes remain to be revealed.
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公开(公告)号：US20250053639A1
公开(公告)日：2025-02-13
申请号：US18366727
申请日：2023-08-08
Applicant: NXP B.V.
Inventor： Marcel Medwed , Erik Kraft , Jan Hoogerbrugge , Tobias Schneider
Abstract: A method is provided to protect a stack of return addresses from manipulation. The return address indicates where to return in a computer program after a subroutine is called. In the method, an encryption key and an initial tweak value is selected. For a return address to be stored on the stack, a first chained address is generated by encrypting the return address with the encryption key and the initial tweak value. The first chained address is provided to the stack instead of the return address. For a subsequent return address that is subsequent to the return address, a second chained address is generated by encrypting the subsequent return address with the encryption key and the first chained address. The second chained address is provided to the stack instead of the subsequent return address. The method provides effective protection without requiring additional memory in a memory limited system.
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公开(公告)号：US20240388429A1
公开(公告)日：2024-11-21
申请号：US18319982
申请日：2023-05-18
Applicant: NXP B.V.
Inventor： Christine van Vredendaal , Melissa Azouaoui , Marcel Medwed , Tobias Schneider
Abstract: A data processing system comprising instructions embodied in a non-transitory computer readable medium, the instructions for generating keys in a hash based signature system in a processor, the instructions, including: generating, by a random number generator, a seed; repeatedly hashing the seed with a first hash function to produce n/k chained seeds, wherein n is a total number secret keys generated and k is a number of secret keys generated from each chained seed; and generating k secret keys from each of the n/k chained seeds using a second hash function, wherein at least one of the k secret keys is generated from another of the k secret keys in a sequential chain.
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公开(公告)号：US11651354B2
公开(公告)日：2023-05-16
申请号：US16567626
申请日：2019-09-11
Applicant: NXP B.V.
Inventor： Marcel Medwed , Mario Lamberger
CPC classification number: G06Q20/3678 , G06Q20/0655 , G06Q20/383 , G06Q20/3825
Abstract: A method for managing an anonymous e-cash transaction includes receiving a request to withdraw a payment coin, generating a combination of random attributes for the payment coin, creating the payment coin based on the combination of attributes, and issuing the payment coin in exchange for a first asset. Each attribute of the combination of attributes may represent a different portion of a total value of the payment coin. A partially spent value of the payment coin may be based on a revealed subset of the combination of attributes. The method further includes
creating a refund coin based on the combination of attributes and spending the refund coin to issue a refund having a value corresponding to an unspent portion of the payment coin. Each attribute of the combination of attributes of the refund coin may represent a different portion of a total value of the refund coin.-
公开(公告)号：US11412373B2
公开(公告)日：2022-08-09
申请号：US16839719
申请日：2020-04-03
Applicant: NXP B.V.
Inventor： Marcel Medwed , Stefan Lemsitzer
IPC: H04W12/02 , H04W12/0433 , H04W12/069 , H04L9/32 , H04L9/40
Abstract: Various embodiments relate to a method and system for resuming a secure communication session with a server by a device, including: sending a message to the server requesting the resumption of a secure communication session; receiving from the server a server identifier, a server nonce, and a salt; determining that the device has a shared key with the server based upon the server identifier; determining that the received salt is valid; calculating a salted identifier based upon the shared key and the salt; sending the salted identifier to the server; and resuming the secure communication session with the server.
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Patent Agency Ranking
公开(公告)号：US12265626B2
公开(公告)日：2025-04-01
申请号：US17830197
申请日：2022-06-01
Applicant: NXP B.V.
Inventor： Marcel Medwed , Ventzislav Nikov , Tobias Schneider
Abstract: One example securely updates an integrated circuit to mitigate undesirable modifications and this involves an application circuit accessing an external network while a (e.g., nonvolatile) program memory is write protected; and a reset-boot circuit resetting and booting the application circuit while access to the external network is disabled, and causing an update for the application circuit. In response to an indication that an update is downloaded for installation, the downloaded update is installed in the memory while access to the external network is disabled, and execution of the reset mode is permitted after the update is installed. Also, a retrieval module may download, in response to an indication that an update is not downloaded, an update provided via the external network while the memory is write-protected and thereby permitting execution of the reset mode after the update is downloaded.
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公开(公告)号：US20230395110A1
公开(公告)日：2023-12-07
申请号：US17830197
申请日：2022-06-01
Applicant: NXP B.V.
Inventor： Marcel Medwed , Ventzislav Nikov , Tobias Schneider
CPC classification number: G11C7/24 , G11C7/1096 , G11C7/20 , G06F21/572
Abstract: One example securely updates an integrated circuit to mitigate undesirable modifications and this involves an application circuit accessing an external network while a (e.g., nonvolatile) program memory is write protected; and a reset-boot circuit resetting and booting the application circuit while access to the external network is disabled, and causing an update for the application circuit. In response to an indication that an update is downloaded for installation, the downloaded update is installed in the memory while access to the external network is disabled, and execution of the reset mode is permitted after the update is installed. Also, a retrieval module may download, in response to an indication that an update is not downloaded, an update provided via the external network while the memory is write-protected and thereby permitting execution of the reset mode after the update is downloaded.
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公开(公告)号：US20210133362A1
公开(公告)日：2021-05-06
申请号：US17081589
申请日：2020-10-27
Applicant: NXP B.V.
Inventor： Marcel Medwed , Tobias Schneider , Ventzislav Nikov , Jorge Miguel Ventuzelos Pereira , Rudi Verslegers , Nikita Veshchikov , Joppe Willem Bos , Jan Hoogerbrugge
Abstract: A device and methods are described that comprise at least one host application and a rich execution environment. At least one interface is operably coupled to the REE for communicating with a remote server. A security sub-system comprises a security monitoring and control circuit coupled to the REE and connectable to the remote server via the REE and the at least one interface. The security monitoring and control circuit comprises an analytics circuit configured to detect an anomaly following a compromisation of the device. The security monitoring and control circuit is arranged to treat the REE as an untrusted component and in response to a detection of a compromisation of the REE or a component in the device that is accessible by the REE by the analytics circuit, the security monitoring and control circuit is configured to re-establish a secure connection to the remote server that tunnels through the REE and at least partially removes the compromisation from the device.
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公开(公告)号：US20200264976A1
公开(公告)日：2020-08-20
申请号：US16278246
申请日：2019-02-18
Applicant: NXP B.V.
Inventor： Jan Hoogerbrugge , Marcel Medwed , Ventzislav Nikov , Asier Goikoetxea Yanci
IPC: G06F12/0802
Abstract: A data processing system and method for protecting a memory from unauthorized accesses are provided. The data processing system includes a system bus, a memory coupled to the system bus through a memory controller, and a processing core including a cache system. The memory controller is coupled to the system bus for controlling accesses to the memory that are requested by the processing core. A memory protection circuit is coupled to the system bus and to the processing core. The memory protection circuit uses one or more memory safety violation (MSV) indicators stored in out-of-bounds areas of the memory for detecting when the processing core attempts to access an out-of-bounds area of the memory. The processing core generates an error signal, such as an interrupt, when an attempt to access the out-of-bounds area is detected. The out-of-bounds area may be an unallocated area of the memory. The MSV indicator may be written to the memory by executing a flush instruction of the cache system and may include the same number of bits as a cache line of the cache system. A data value of the MSV indicator may be a secret data value.
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公开(公告)号：US10678474B1
公开(公告)日：2020-06-09
申请号：US16206066
申请日：2018-11-30
Applicant: NXP B.V.
Inventor： Marcel Medwed , Jan Hoogerbrugge , Ventzislav Nikov
Abstract: A computing system using low-fat pointers, including: a memory configured to be accessed by the low-fat pointers; a processing core configured to access the memory; an interrupt controller configured to receive interrupts and to communicate interrupts to processes running on the processing core; and a memory safety peripheral configured to receive a pointer request, wherein the pointer is a low-fat pointer and to verify that the pointer request is within required memory bounds.
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