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公开(公告)号：US09425130B2
公开(公告)日：2016-08-23
申请号：US14527365
申请日：2014-10-29
Applicant: NXP B.V.
Inventor： Chi Ho Leung , Wai Hung William Hor , Soenke Habenicht , Pompeo Umali , WaiKeung Ho , Yee Wai Fung
IPC: H01L21/56 , H01L23/495 , H01L23/31
CPC classification number: H01L23/49537 , H01L21/561 , H01L23/3107 , H01L23/49562 , H01L23/49575 , H01L2924/0002 , H01L2924/00
Abstract: Consistent with an example embodiment, there is leadless packaged semiconductor device having top and bottom opposing major surfaces and sidewalls extending there between. The leadless packaged semiconductor device comprises a lead frame sub-assembly having an array of two or more lead frame portions each having a semiconductor die arranged thereon. There are at least five I/O terminals wherein each of said terminals comprise a respective metal side pad wherein the respective metal side pad is disposed in a recess. A feature of this embodiment is that the each of the side pads is electroplated. The electroplated side pads accept solder and the solder menisci are contained by the recesses.
Abstract translation: 与示例性实施例一致，存在无铅封装半导体器件，其具有顶部和底部相对的主表面和在其之间延伸的侧壁。 无引线封装半导体器件包括具有两个或更多个引线框架部分的阵列的引线框架子组件，每个引线框架部分均布置有半导体管芯。 存在至少五个I / O端子，其中每个所述端子包括相应的金属侧焊盘，其中相应的金属侧焊盘设置在凹部中。 该实施例的特征在于每个侧垫都是电镀的。 电镀侧垫接受焊料，凹槽中容纳焊料半导体。
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公开(公告)号：US20160126162A1
公开(公告)日：2016-05-05
申请号：US14527365
申请日：2014-10-29
Applicant: NXP B.V.
Inventor： Chi Ho Leung , Wai Hung William Hor , Soenke Habenicht , Pompeo Umali , WaiKeung Ho , Yee Wai Fung
IPC: H01L23/495 , H01L21/56
CPC classification number: H01L23/49537 , H01L21/561 , H01L23/3107 , H01L23/49562 , H01L23/49575 , H01L2924/0002 , H01L2924/00
Abstract: Consistent with an example embodiment, there is leadless packaged semiconductor device having top and bottom opposing major surfaces and sidewalls extending there between. The leadless packaged semiconductor device comprises a lead frame sub-assembly having an array of two or more lead frame portions each having a semiconductor die arranged thereon. There are at least five I/O terminals wherein each of said terminals comprise a respective metal side pad wherein the respective metal side pad is disposed in a recess. A feature of this embodiment is that the each of the side pads is electroplated. The electroplated side pads accept solder and the solder menisci are contained by the recesses.
Abstract translation: 与示例性实施例一致，存在无铅封装半导体器件，其具有顶部和底部相对的主表面和在其之间延伸的侧壁。 无引线封装半导体器件包括具有两个或更多个引线框架部分的阵列的引线框架子组件，每个引线框架部分均布置有半导体管芯。 存在至少五个I / O端子，其中每个所述端子包括相应的金属侧焊盘，其中相应的金属侧焊盘设置在凹部中。 该实施例的特征在于每个侧垫都是电镀的。 电镀侧垫接受焊料，凹槽中容纳焊料半导体。
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公开(公告)号：US09443791B2
公开(公告)日：2016-09-13
申请号：US14801635
申请日：2015-07-16
Applicant: NXP B.V.
Inventor： Chi Ho Leung , Ke Xue , Soenke Habenicht , Wai Hung William Hor , San Ming Chan , Wai Keung Ng
CPC classification number: H01L23/4952 , H01L21/56 , H01L21/561 , H01L21/78 , H01L23/3121 , H01L23/49541 , H01L23/49582 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/85 , H01L24/97 , H01L2224/32245 , H01L2224/371 , H01L2224/40245 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48095 , H01L2224/48247 , H01L2224/48465 , H01L2224/4903 , H01L2224/73265 , H01L2224/85444 , H01L2224/97 , H01L2924/00014 , H01L2924/15747 , H01L2924/181 , H01L2924/19107 , H01L2924/00 , H01L2924/00012 , H01L2224/05599
Abstract: A method of forming semiconductor devices on a leadframe structure. The leadframe structure comprising an array of leadframe sub-structures each having a semiconductor die arranged thereon. The method comprises; providing electrical connections between terminals of said lead frame sub-structures and said leadframe structure; encapsulating said leadframe structure, said electrical connections and said terminals in an encapsulation layer; performing a first series of parallel cuts extending through the leadframe structure and the encapsulation layer to expose a side portion of said terminals; electro-plating said terminals to form metal side pads; and performing a second series of parallel cuts angled with respect to the first series of parallel cuts, the second series of cuts extending through the lead frame structure and the encapsulation layer to singulate a semiconductor device from the leadframe structure.
Abstract translation: 一种在引线框结构上形成半导体器件的方法。 所述引线框架结构包括每个具有布置在其上的半导体管芯的引线框子结构的阵列。 该方法包括： 在所述引线框架子结构和所述引线框架结构的端子之间提供电连接; 封装所述引线框结构，所述电连接和所述端子在封装层中; 执行延伸穿过引线框架结构和封装层的第一系列平行切割以暴露所述端子的侧部; 电镀所述端子以形成金属侧垫; 以及执行相对于所述第一系列平行切口成角度的第二系列平行切口，所述第二系列切口延伸穿过所述引线框架结构和所述封装层，以从所述引线框架结构分离半导体器件。
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公开(公告)号：US20160035651A1
公开(公告)日：2016-02-04
申请号：US14801635
申请日：2015-07-16
Applicant: NXP B.V.
Inventor： Chi Ho Leung , Ke Xue , Soenke Habenicht , Wai Hung William Hor , San Ming Chan , Wai Keung Ng
IPC: H01L23/495 , H01L21/56 , H01L21/78 , H01L23/00
CPC classification number: H01L23/4952 , H01L21/56 , H01L21/561 , H01L21/78 , H01L23/3121 , H01L23/49541 , H01L23/49582 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/85 , H01L24/97 , H01L2224/32245 , H01L2224/371 , H01L2224/40245 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48095 , H01L2224/48247 , H01L2224/48465 , H01L2224/4903 , H01L2224/73265 , H01L2224/85444 , H01L2224/97 , H01L2924/00014 , H01L2924/15747 , H01L2924/181 , H01L2924/19107 , H01L2924/00 , H01L2924/00012 , H01L2224/05599
Abstract: A method of forming semiconductor devices on a leadframe structure. The leadframe structure comprising an array of leadframe sub-structures each having a semiconductor die arranged thereon. The method comprises; providing electrical connections between terminals of said lead frame sub-structures and said leadframe structure; encapsulating said leadframe structure, said electrical connections and said terminals in an encapsulation layer; performing a first series of parallel cuts extending through the leadframe structure and the encapsulation layer to expose a side portion of said terminals; electro-plating said terminals to form metal side pads; and performing a second series of parallel cuts angled with respect to the first series of parallel cuts, the second series of cuts extending through the lead frame structure and the encapsulation layer to singulate a semiconductor device from the leadframe structure.
Abstract translation: 一种在引线框结构上形成半导体器件的方法。 所述引线框架结构包括每个具有布置在其上的半导体管芯的引线框子结构的阵列。 该方法包括： 在所述引线框架子结构和所述引线框架结构的端子之间提供电连接; 封装所述引线框结构，所述电连接和所述端子在封装层中; 执行延伸穿过引线框架结构和封装层的第一系列平行切割以暴露所述端子的侧部; 电镀所述端子以形成金属侧垫; 以及执行相对于所述第一系列平行切口成角度的第二系列平行切口，所述第二系列切口延伸穿过所述引线框架结构和所述封装层，以从所述引线框架结构分离半导体器件。
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