FREQUENCY SYNTHESIZERS WITH ADJUSTABLE DELAYS
    1.
    发明申请
    FREQUENCY SYNTHESIZERS WITH ADJUSTABLE DELAYS 有权
    具有可调延迟的频率合成器

    公开(公告)号:US20170063387A1

    公开(公告)日:2017-03-02

    申请号:US14836797

    申请日:2015-08-26

    申请人: NXP B.V.

    IPC分类号: H03L7/197 H03L7/099 H03K5/13

    摘要: A radio frequency (RF) signal can be produced with an RF frequency that is responsive to a frequency reference (FREF) clock. An inductive-capacitive (LC) tank oscillator circuit can generate the RF signal. A digital to time converter (DTC) circuit can operate, for a first edge of the FREF clock, in a baseline mode that has a first delay, and for a subsequent edge of the FREF clock, in a delay mode that introduces a second delay value to the FREF clock. A controller circuit can enable the LC-tank oscillator circuit in response to a first edge of the FREF clock and to set or increase the second delay value of the delay mode as a function of the frequency of the RF signal. A phase detector circuit can detect, for the subsequent edge of the FREF clock, a phase difference between the FREF clock and the RF signal.

    摘要翻译: 射频(RF)信号可以产生具有响应于频率参考(FREF)时钟的RF频率。 电感电容(LC)振荡电路可以产生RF信号。 对于FREF时钟的第一边缘,数字到时间转换器(DTC)电路可以在具有第一延迟的基线模式中以及在FREF时钟的后续边沿处以引入第二延迟的延迟模式 值到FREF时钟。 控制器电路可以响应于FREF时钟的第一边缘而使LC-槽振荡器电路能够设置或增加作为RF信号的频率的函数的延迟模式的第二延迟值。 相位检测器电路可以检测FREF时钟的后续边沿FREF时钟和RF信号之间的相位差。

    Frequency synthesizers with amplitude control
    2.
    发明授权
    Frequency synthesizers with amplitude control 有权
    频率合成器具有幅度控制

    公开(公告)号:US09401724B1

    公开(公告)日:2016-07-26

    申请号:US14836823

    申请日:2015-08-26

    申请人: NXP B.V.

    摘要: A frequency synthesizer device provides amplitude control. Using switch circuit operating in a first mode, a charge voltage is applied to an oscillator circuit that an inductive-capacitive (LC) tank circuit. The LC tank circuit has a capacitive element, and an inductive element that is connected to the capacitive element. Using the switch circuit operating in a second mode, the LC tank circuit is enabled to oscillate. Using driver circuits that are response to a voltage applied to the tank circuit, current is reinforced in the LC tank, and the reinforcement is based upon a transconductance gain of the driver circuits. Using a calibration circuit, an amplitude of an output signal from the oscillator circuit is detected. In response to the detected amplitude, the transconductance gain is adjusted by enabling or disabling auxiliary circuits from plurality of auxiliary circuits.

    摘要翻译: 频率合成器装置提供幅度控制。 使用在第一模式下操作的开关电路,将充电电压施加到电感 - 电容(LC)电路的振荡器电路。 LC槽电路具有电容元件和连接到电容元件的电感元件。 使用在第二模式下操作的开关电路,LC振荡电路能够振荡。 使用响应于施加到储能电路的电压的驱动电路,LC箱中的电流被增强,并且加强是基于驱动电路的跨导增益。 使用校准电路,检测来自振荡电路的输出信号的振幅。 响应于检测到的幅度,通过启用或禁用来自多个辅助电路的辅助电路来调节跨导增益。

    ACTIVE RC-TYPE FILTER AND METHOD OF IMPLEMENTING AN ACTIVE RC-TYPE FILTER

    公开(公告)号:US20240154604A1

    公开(公告)日:2024-05-09

    申请号:US18497012

    申请日:2023-10-30

    申请人: NXP B.V.

    IPC分类号: H03H11/12 G01S13/34

    CPC分类号: H03H11/1217 G01S13/34

    摘要: In accordance with a first aspect of the present disclosure, an active RC-type filter is provided, comprising: an input, an output and a signal path between said input and output; at least one capacitor bank and at least one resistor bank, wherein said capacitor bank and resistor bank are integrated into the signal path; wherein the resistor bank comprises a plurality of resistor ladders; wherein each one of said resistor ladders comprises a plurality of resistors connected in series; wherein each one of said resistors has an input node configured to be coupled selectively to the signal path through one of a plurality of controllable switches; and wherein said resistor ladders have output nodes directly coupled to each other and to the signal path. In accordance with a second aspect of the present disclosure, a corresponding method of implementing an active RC-type filter is conceived.

    Frequency synthesizers with adjustable delays
    4.
    发明授权
    Frequency synthesizers with adjustable delays 有权
    具有可调延迟的频率合成器

    公开(公告)号:US09590646B1

    公开(公告)日:2017-03-07

    申请号:US14836797

    申请日:2015-08-26

    申请人: NXP B.V.

    摘要: A radio frequency (RF) signal can be produced with an RF frequency that is responsive to a frequency reference (FREF) clock. An inductive-capacitive (LC) tank oscillator circuit can generate the RF signal. A digital to time converter (DTC) circuit can operate, for a first edge of the FREF clock, in a baseline mode that has a first delay, and for a subsequent edge of the FREF clock, in a delay mode that introduces a second delay value to the FREF clock. A controller circuit can enable the LC-tank oscillator circuit in response to a first edge of the FREF clock and to set or increase the second delay value of the delay mode as a function of the frequency of the RF signal. A phase detector circuit can detect, for the subsequent edge of the FREF clock, a phase difference between the FREF clock and the RF signal.

    摘要翻译: 射频(RF)信号可以产生具有响应于频率参考(FREF)时钟的RF频率。 电感电容(LC)振荡电路可以产生RF信号。 对于FREF时钟的第一边缘,数字到时间转换器(DTC)电路可以在具有第一延迟的基线模式中以及在FREF时钟的后续边沿处以引入第二延迟的延迟模式 值到FREF时钟。 控制器电路可以响应于FREF时钟的第一边缘而使LC-槽振荡器电路能够设置或增加作为RF信号的频率的函数的延迟模式的第二延迟值。 相位检测器电路可以检测FREF时钟的后续边沿FREF时钟和RF信号之间的相位差。

    Oscillator with favorable startup
    5.
    发明授权
    Oscillator with favorable startup 有权
    振荡器有利启动

    公开(公告)号:US09369085B1

    公开(公告)日:2016-06-14

    申请号:US14836727

    申请日:2015-08-26

    申请人: NXP B.V.

    IPC分类号: H03B5/06 H03B5/12 H03L3/00

    摘要: In an example embodiment, an apparatus includes an LC circuit having a capacitive circuit and an inductive circuit connected in a circuit loop. The inductive circuit includes one or more inductive elements and a switching circuit. In a first mode, the switching circuit provides a direct-current charge voltage across the LC circuit and prevents oscillation of energy between the capacitive circuit and the inductive circuit by opening a switch in the circuit loop of the LC circuit. In a second mode, the switching circuit enables oscillation of energy between the capacitive circuit and the inductive circuit by closing the switch in the circuit loop.

    摘要翻译: 在示例性实施例中,一种装置包括具有电容电路的LC电路和以电路回路连接的感应电路。 感应电路包括一个或多个电感元件和开关电路。 在第一模式中,开关电路在LC电路两端提供直流充电电压,并通过打开LC电路的电路回路中的开关来防止电容电路和感应电路之间的能量振荡。 在第二模式中,开关电路通过闭合电路回路中的开关来实现电容电路和感应电路之间的能量的振荡。

    Capacitor arrangement for oscillator
    6.
    发明授权
    Capacitor arrangement for oscillator 有权
    振荡器的电容器配置

    公开(公告)号:US09356557B1

    公开(公告)日:2016-05-31

    申请号:US14836759

    申请日:2015-08-26

    申请人: NXP B.V.

    摘要: In an example embodiment, an apparatus includes an LC circuit having a capacitive circuit and an inductive circuit connected in a circuit loop. In a first mode, a switching circuit in the inductive circuit provides a charge voltage across the LC circuit and prevents oscillation of the LC circuit by opening a switch in the circuit loop. In a second mode, the switching circuit enables the oscillation of the LC circuit by closing the switch in the circuit loop. The adjustable capacitive circuit includes capacitive branch circuits configured to contribute a first amount of capacitance when enabled. For each capacitive branch circuit, an initialization circuit couples the set of capacitors to a respective reference voltage in response to the capacitive branch circuit being disabled and the switching circuit operating in the first mode.

    摘要翻译: 在示例性实施例中,一种装置包括具有电容电路的LC电路和以电路回路连接的感应电路。 在第一模式中,感应电路中的开关电路在LC电路两端提供充电电压,并通过打开电路回路中的开关来防止LC电路的振荡。 在第二模式中,开关电路通过闭合电路回路中的开关来实现LC电路的振荡。 可调电容电路包括被配置为在使能时贡献第一电容量的电容性分支电路。 对于每个电容分支电路,初始化电路响应于电容性分支电路被禁用并且开关电路以第一模式工作,将该组电容器耦合到相应的参考电压。