公开(公告)号：US20170220519A1

公开(公告)日：2017-08-03

申请号：US15490465

申请日：2017-04-18

Applicant: NXP USA, Inc.

Inventor： Nicholas J. Spence ,  Jason R. Fender ,  Michael L. Fraser

IPC: G06F13/42 ,  G06F13/40 ,  G06F13/16

CPC classification number: G06F13/1642 ,  G06F13/1673 ,  G06F13/4068 ,  G06F13/4291

Abstract: A Universal SPI Interface is provided that is compatible, without the need for additional interface logic or software, with the SPI bus, existing DSA and other serial busses similar to (but not directly compatible with) the SPI bus, and parallel busses requiring compatibility with 74xx164-type signaling. In an additional aspect, a red Universal SPI Interface is provided that provides the same universal interface, but using fewer external output pins. The Universal SPI Interface includes multiple latches, buffers, and in an alternative embodiment, a multiplexer, configured together such that a Universal SPI interface is provided that can be readily reconfigured using only input signals to provide compatibility across multiple bus interfaces.

公开(公告)号：US10318447B2

公开(公告)日：2019-06-11

申请号：US15490465

申请日：2017-04-18

Applicant: NXP USA, Inc.

Inventor： Nicholas J. Spence ,  Jason R. Fender ,  Michael L. Fraser

IPC: G06F13/16 ,  G06F13/40 ,  G06F13/42

Abstract: A Universal SPI Interface is provided that is compatible, without the need for additional interface logic or software, with the SPI bus, existing DSA and other serial busses similar to (but not directly compatible with) the SPI bus, and parallel busses requiring compatibility with 74xx 164-type signaling. In an additional aspect, a reduced-pincount Universal SPI Interface is provided that provides the same universal interface, but using fewer external output pins. The Universal SPI Interface includes multiple latches, buffers, and in an alternative embodiment, a multiplexer, configured together such that a Universal SPI Interface is provided that can be readily reconfigured using only input signals to provide compatibility across multiple bus interfaces.

公开(公告)号：US10027284B2

公开(公告)日：2018-07-17

申请号：US15393473

申请日：2016-12-29

Applicant: NXP USA, Inc.

Inventor： Joseph Staudinger ,  Abdulrhman M. S. Ahmed ,  Paul R. Hart ,  Monte G. Miller ,  Nicholas J. Spence

IPC: H03F3/19 ,  H03F1/02 ,  H03F1/32 ,  H03F3/24

Abstract: An embodiment of an amplifier system includes a modifiable signal adjustment device with an RF signal adjustment circuit coupled between first and second nodes. The RF signal adjustment circuit includes an adjustable phase shifter and an adjustable attenuator coupled in series with each other. The device also includes a memory and a controller circuit. The controller circuit retrieves a phase shift value and an attenuation value from the memory. The controller circuit then controls the adjustable phase shifter to apply a phase shift corresponding to the phase shift value to an input RF signal received at the first node, and controls the adjustable attenuator to apply an attenuation corresponding to the attenuation value to the input RF signal. Applying the phase shift and the attenuation results in an output RF signal at the second node.

公开(公告)号：US20170111014A1

公开(公告)日：2017-04-20

申请号：US15393473

申请日：2016-12-29

Applicant: NXP USA, Inc.

Inventor： Joseph Staudinger ,  Abdulrhman M. S. Ahmed ,  Paul R. Hart ,  Monte G. Miller ,  Nicholas J. Spence

IPC: H03F1/02 ,  H03F3/19 ,  H03F3/24 ,  H03F1/32

CPC classification number: H03F1/0288 ,  H03F1/3247 ,  H03F1/3282 ,  H03F3/19 ,  H03F3/245 ,  H03F2200/222 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2201/3233 ,  H03F2203/21106

Abstract: An embodiment of an amplifier system includes a modifiable signal adjustment device with an RF signal adjustment circuit coupled between first and second nodes. The RF signal adjustment circuit includes an adjustable phase shifter and an adjustable attenuator coupled in series with each other. The device also includes a memory and a controller circuit. The controller circuit retrieves a phase shift value and an attenuation value from the memory. The controller circuit then controls the adjustable phase shifter to apply a phase shift corresponding to the phase shift value to an input RF signal received at the first node, and controls the adjustable attenuator to apply an attenuation corresponding to the attenuation value to the input RF signal. Applying the phase shift and the attenuation results in an output RF signal at the second node.

公开(公告)号：US09979355B2

公开(公告)日：2018-05-22

申请号：US15393473

申请日：2016-12-29

Applicant: NXP USA, Inc.

Inventor： Joseph Staudinger ,  Abdulrhman M. S. Ahmed ,  Paul R. Hart ,  Monte G. Miller ,  Nicholas J. Spence

IPC: H03F3/19 ,  H03F1/02 ,  H03F1/32 ,  H03F3/24

Abstract: An embodiment of an amplifier system includes a modifiable signal adjustment device with an RF signal adjustment circuit coupled between first and second nodes. The RF signal adjustment circuit includes an adjustable phase shifter and an adjustable attenuator coupled in series with each other. The device also includes a memory and a controller circuit. The controller circuit retrieves a phase shift value and an attenuation value from the memory. The controller circuit then controls the adjustable phase shifter to apply a phase shift corresponding to the phase shift value to an input RF signal received at the first node, and controls the adjustable attenuator to apply an attenuation corresponding to the attenuation value to the input RF signal. Applying the phase shift and the attenuation results in an output RF signal at the second node.