VARIABLE RESISTANCE NON-VOLATILE MEMORY CELLS AND METHODS OF FABRICATING SAME
    4.
    发明申请
    VARIABLE RESISTANCE NON-VOLATILE MEMORY CELLS AND METHODS OF FABRICATING SAME 有权
    可变电阻非挥发性记忆细胞及其制备方法

    公开(公告)号:US20080315174A1

    公开(公告)日:2008-12-25

    申请号:US11775657

    申请日:2007-07-10

    IPC分类号: H01L21/336 H01L47/00

    摘要: Methods of fabricating integrated circuit memory cells and integrated circuit memory cells are disclosed. An integrated circuit memory cell can be fabricated by forming a cup-shaped electrode on sidewalls of an opening in an insulation layer and through the opening on an ohmic layer that is stacked on a conductive structure. An insulation filling member is formed that at least partially fills an interior of the electrode. The insulation filling member is formed within a range of temperatures that is sufficiently low to not substantially change resistance of the ohmic layer. A variable resistivity material is formed on the insulation filling member and is electrically connected to the electrode.

    摘要翻译: 公开了制造集成电路存储单元和集成电路存储单元的方法。 可以通过在绝缘层中的开口的侧壁上形成杯形电极,并通过层叠在导电结构上的欧姆层上的开口来制造集成电路存储单元。 形成绝缘填充构件,其至少部分地填充电极的内部。 绝缘填充构件形成在足够低的温度范围内,而不能实质上改变欧姆层的电阻。 在绝缘填充构件上形成可变电阻率材料并与电极电连接。

    Variable resistance non-volatile memory cells and methods of fabricating same
    5.
    发明授权
    Variable resistance non-volatile memory cells and methods of fabricating same 有权
    可变电阻非易失性存储单元及其制造方法

    公开(公告)号:US07863173B2

    公开(公告)日:2011-01-04

    申请号:US11775657

    申请日:2007-07-10

    IPC分类号: H01L21/20

    摘要: Methods of fabricating integrated circuit memory cells and integrated circuit memory cells are disclosed. An integrated circuit memory cell can be fabricated by forming a cup-shaped electrode on sidewalls of an opening in an insulation layer and through the opening on an ohmic layer that is stacked on a conductive structure. An insulation filling member is formed that at least partially fills an interior of the electrode. The insulation filling member is formed within a range of temperatures that is sufficiently low to not substantially change resistance of the ohmic layer. A variable resistivity material is formed on the insulation filling member and is electrically connected to the electrode.

    摘要翻译: 公开了制造集成电路存储单元和集成电路存储单元的方法。 可以通过在绝缘层中的开口的侧壁上形成杯形电极,并通过层叠在导电结构上的欧姆层上的开口来制造集成电路存储单元。 形成绝缘填充构件,其至少部分地填充电极的内部。 绝缘填充构件形成在足够低的温度范围内,而不能实质上改变欧姆层的电阻。 在绝缘填充构件上形成可变电阻率材料并与电极电连接。

    Phase change memory device and method of forming the same
    6.
    发明授权
    Phase change memory device and method of forming the same 有权
    相变存储器件及其形成方法

    公开(公告)号:US07812332B2

    公开(公告)日:2010-10-12

    申请号:US11769532

    申请日:2007-06-27

    IPC分类号: H01L45/00

    摘要: A phase change memory device includes a current restrictive element interposed between an electrically conductive element and a phase change material. The current restrictive element includes a plurality of overlapping film patterns, each of which having a respective first portion proximal to the conductive element and a second portion proximal to the phase change material. The second portions are configured and dimensioned to have higher resistance than the first portions.

    摘要翻译: 相变存储器件包括介于导电元件和相变材料之间的电流限制元件。 电流限制元件包括多个重叠的膜图案,每个重叠的膜图案具有靠近导电元件的相应的第一部分和靠近相变材料的第二部分。 第二部分的构造和尺寸设计成具有比第一部分更高的电阻。

    Phase Change Memory Device and Method of Forming the Same
    10.
    发明申请
    Phase Change Memory Device and Method of Forming the Same 有权
    相变存储器件及其形成方法

    公开(公告)号:US20080116437A1

    公开(公告)日:2008-05-22

    申请号:US11769532

    申请日:2007-06-27

    IPC分类号: H01L47/00

    摘要: A phase change memory device includes a current restrictive element interposed between an electrically conductive element and a phase change material. The current restrictive element includes a plurality of overlapping film patterns, each of which having a respective first portion proximal to the conductive element and a second portion proximal to the phase change material. The second portions are configured and dimensioned to have higher resistance than the first portions.

    摘要翻译: 相变存储器件包括介于导电元件和相变材料之间的电流限制元件。 电流限制元件包括多个重叠的膜图案,每个重叠的膜图案具有靠近导电元件的相应的第一部分和靠近相变材料的第二部分。 第二部分的构造和尺寸设计成具有比第一部分更高的电阻。