公开(公告)号：US09715430B2

公开(公告)日：2017-07-25

申请号：US14789513

申请日：2015-07-01

申请人： NandEXT S.r.l.

发明人： Margherita Maffeis

IPC分类号： H03M13/00 ,  G06F11/10 ,  G11C16/04 ,  G06F3/06 ,  G11C29/52 ,  G11C29/04

CPC分类号： G06F11/1072 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0653 ,  G06F3/0679 ,  G06F11/1012 ,  G11C16/0408 ,  G11C29/52 ,  G11C2029/0411

摘要： A controller for a solid state drive is proposed. The solid state drive comprises a plurality of memory cells, wherein each memory cell comprises a floating gate transistor for storing a symbol when programmed with a threshold voltage associated with that symbol, and wherein each threshold voltage is variable over the memory cells of the plurality of memory cells thereby defining a corresponding threshold voltage distribution. The controller comprises: an encoding unit for encoding information bits into encoded bits; a mapping unit for mapping the encoded bits into symbols to be stored, each one for being stored into a respective target memory cell, wherein the mapping comprises associating the symbols to be stored with the target memory cells in such a way that the threshold voltage distributions associated with said symbols to be stored define overlapping regions smaller than a predetermined overlapping region indicative of an admitted bit error rate; a demapping unit for demapping read symbols read from the target memory cells and providing metrics indicative of a distance between the threshold voltage distributions associated with the read symbols; a conversion unit for converting the metrics into an indication of the reliability of the read symbols; and a soft decoding unit for soft decoding the read symbols according to the indication of the reliability of the read symbols thereby obtaining the information bits. A corresponding solid state drive is also proposed.

公开(公告)号：US20170269993A1

公开(公告)日：2017-09-21

申请号：US15076401

申请日：2016-03-21

申请人： NandEXT S.r.l.

发明人： Margherita Maffeis

IPC分类号： G06F11/10 ,  H03M13/11 ,  H03M13/37 ,  G11C29/52

CPC分类号： H03M13/3746 ,  G06F11/1012 ,  G11C29/52 ,  G11C2029/0409 ,  H03M13/1111 ,  H03M13/3723 ,  H03M13/458 ,  H03M13/6325

摘要： A method is proposed for decoding read bits including information bits from memory cells of a solid state drive. The method comprises providing an indication of reliability of the read bits, and, based on said indication of reliability, iteratively soft decoding the read bits in order to obtain said information bits. Said soft decoding comprises, at each iteration of the soft decoding, if the current number of iterations has reached a predetermined number of iterations indicative of an admitted latency of the solid state drive, and if no information bits having an error rate below a predetermined error rate have been obtained, providing a further indication of reliability of the read bits, and iteratively soft decoding the read bits based on said further indication of reliability. A corresponding solid state drive is also proposed.

公开(公告)号：US09722635B2

公开(公告)日：2017-08-01

申请号：US14789522

申请日：2015-07-01

申请人： NandEXT S.r.l.

发明人： Margherita Maffeis

IPC分类号： G06F11/00 ,  H03M13/00 ,  H03M13/41 ,  H03M13/11 ,  G06F11/10 ,  G11C7/04 ,  H03M13/23 ,  G11C29/52 ,  G11C29/04

CPC分类号： H03M13/4146 ,  G06F11/1072 ,  G11C7/04 ,  G11C29/52 ,  G11C2029/0411 ,  H03M13/1111 ,  H03M13/116 ,  H03M13/23 ,  H03M13/4138 ,  H03M13/635

摘要： A controller for a solid state drive is proposed. The solid state drive comprises memory cells each one for storing a symbol among a plurality of possible symbols that the memory cell is designed to store. The controller comprises a unit for encoding information bits into encoded bits; a unit for mapping the encoded bits into the symbols, wherein the symbols are determined based on a plurality of allowed symbols, among the possible symbols, that the memory cells are allowed to store, whereas the symbols, among the possible symbols, other than the allowed symbols define forbidden symbols not allowed to be stored in the memory cells; a unit for demapping read symbols and for providing an indication of the reliability of the read symbols based on the forbidden symbols; and a unit for soft decoding the read symbols according to the reliability indication thereby obtaining the information bits.

公开(公告)号：US10075191B2

公开(公告)日：2018-09-11

申请号：US15076401

申请日：2016-03-21

申请人： NandEXT S.r.l.

发明人： Margherita Maffeis

IPC分类号： G11C13/00 ,  H03M13/37 ,  G11C29/52 ,  H03M13/11 ,  G06F11/10 ,  H03M13/45 ,  H03M13/00 ,  G11C29/04

CPC分类号： H03M13/3746 ,  G06F11/1012 ,  G11C29/52 ,  G11C2029/0409 ,  H03M13/1111 ,  H03M13/3723 ,  H03M13/458 ,  H03M13/6325

摘要： The invention relates to a method for decoding read bits including information bits from memory cells of a solid-state drive. The method comprises providing an indication of reliability of the read bits, and, based on the indication of reliability, iteratively soft decoding the read bits in order to obtain the information bits, wherein the soft decoding comprises, at each iteration of the soft decoding, if the current number of iterations has reached a predetermined number of iterations indicative of an admitted latency of the solid state drive, and if no information bits having an error rate below a predetermined error rate have been obtained, providing a further indication of reliability of the read bits, and iteratively soft decoding the read bits based on the further indication of reliability. The invention also relates to a corresponding controller and a corresponding solid-state drive.

公开(公告)号：US09836351B2

公开(公告)日：2017-12-05

申请号：US15076415

申请日：2016-03-21

申请人： NandEXT S.r.l.

发明人： Margherita Maffeis

IPC分类号： G06F11/10 ,  G11C16/26 ,  G11C16/10 ,  G11C29/52 ,  G06F3/06

CPC分类号： G06F3/0679 ,  G06F11/1012 ,  G11C16/10 ,  G11C16/26 ,  G11C29/52 ,  G11C2029/0409 ,  G11C2029/0411 ,  H03M13/1105 ,  H03M13/1108 ,  H03M13/1111 ,  H03M13/3723 ,  H03M13/458 ,  H03M13/6325

摘要： A method is proposed for decoding bits stored in memory cells of a solid state drive. Each memory cell comprises a floating gate transistor adapted to store a bit pattern, among a plurality of possible bit patterns, when programmed at a threshold voltage associated with that bit pattern, each threshold voltage being variable over the memory cells thereby defining, for each bit pattern, a corresponding threshold voltage distribution. The bit pattern of each memory cell comprises first and second bits, and the solid state drive is suitable for reading the bit patterns based on fixed reference voltages, each one designed to discern between two respective adjacent threshold voltage distributions, and on additional reference voltages different from the fixed reference voltages. The solid state drive is capable of soft decoding the read bit patterns based on soft information.

公开(公告)号：US20170269994A1

公开(公告)日：2017-09-21

申请号：US15076409

申请日：2016-03-21

申请人： NandEXT S.r.l.

发明人： Margherita Maffeis

IPC分类号： G06F11/10 ,  G11C29/52 ,  G06F3/06 ,  G11C11/56

CPC分类号： G11C29/52 ,  G06F11/1012 ,  G11C7/04 ,  G11C11/5642 ,  G11C16/349 ,  G11C2029/0409 ,  G11C2029/0411 ,  G11C2211/5644 ,  H03M13/1105 ,  H03M13/1108 ,  H03M13/1111 ,  H03M13/3707 ,  H03M13/3723 ,  H03M13/458 ,  H03M13/6325

摘要： A method is proposed for decoding read bits including information bits from memory cells of a solid state drive. The method comprises determining a reliability indication indicative of a reliability of the read bits, and iterating the following sequence of steps: soft decoding the read bits based on said reliability indication in order to obtain said information bits, determining at least one among a time indication indicative of a time elapsed since a last writing of the memory cells and a temperature indication indicative of a temperature of the memory cells, and applying at least one among said time indication and said temperature indication to said reliability indication. A corresponding solid state drive is also proposed.

公开(公告)号：US20170269995A1

公开(公告)日：2017-09-21

申请号：US15076415

申请日：2016-03-21

申请人： NandEXT S.r.l.

发明人： Margherita Maffeis

IPC分类号： G06F11/10 ,  G06F3/06 ,  G11C29/52 ,  G11C16/26 ,  G11C16/10

CPC分类号： G06F3/0679 ,  G06F11/1012 ,  G11C16/10 ,  G11C16/26 ,  G11C29/52 ,  G11C2029/0409 ,  G11C2029/0411 ,  H03M13/1105 ,  H03M13/1108 ,  H03M13/1111 ,  H03M13/3723 ,  H03M13/458 ,  H03M13/6325

摘要： A method is proposed for decoding bits stored in memory cells of a solid state drive. Each memory cell comprises a floating gate transistor adapted to store a bit pattern, among a plurality of possible bit patterns, when programmed at a threshold voltage associated with that bit pattern, each threshold voltage being variable over the memory cells thereby defining, for each bit pattern, a corresponding threshold voltage distribution. The bit pattern of each memory cell comprises first and second bits, and the solid state drive is suitable for reading the bit patterns based on fixed reference voltages, each one designed to discern between two respective adjacent threshold voltage distributions, and on additional reference voltages different from the fixed reference voltages. The solid state drive is capable of soft decoding the read bit patterns based on soft information. The method comprises:reading the first and second bits of the memory cells based on the fixed reference voltages, to obtain read first bits and read second bits, andsoft decoding the read first bits, wherein the soft information exploited for soft decoding the read first bits are based on the read second bits.A corresponding solid state drive is also proposed.

公开(公告)号：US20170004039A1

公开(公告)日：2017-01-05

申请号：US14789513

申请日：2015-07-01

申请人： NandEXT S.r.l.

发明人： Margherita Maffeis

IPC分类号： G06F11/10 ,  G06F3/06 ,  G11C29/52 ,  G11C16/04

CPC分类号： G06F11/1072 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0653 ,  G06F3/0679 ,  G06F11/1012 ,  G11C16/0408 ,  G11C29/52 ,  G11C2029/0411

摘要： A controller for a solid state drive is proposed. The solid state drive comprises a plurality of memory cells, wherein each memory cell comprises a floating gate transistor for storing a symbol when programmed with a threshold voltage associated with that symbol, and wherein each threshold voltage is variable over the memory cells of the plurality of memory cells thereby defining a corresponding threshold voltage distribution. The controller comprises: an encoding unit for encoding information bits into encoded bits; a mapping unit for mapping the encoded bits into symbols to be stored, each one for being stored into a respective target memory cell, said mapping comprising associating the symbols to be stored with the target memory cells in such a way that the threshold voltage distributions associated with said symbols to be stored define overlapping regions smaller than a predetermined overlapping region indicative of an admitted bit error rate; a demapping unit for demapping read symbols read from the target memory cells and providing metrics indicative of a distance between the threshold voltage distributions associated with said read symbols, a conversion unit for converting said metrics into an indication of the reliability of the read symbols, and a soft decoding unit for soft decoding the read symbols according to said indication of the reliability of the read symbols thereby obtaining said information bits.

公开(公告)号：US20170004033A1

公开(公告)日：2017-01-05

申请号：US14789522

申请日：2015-07-01

申请人： NandEXT S.r.l.

发明人： Margherita Maffeis

IPC分类号： G06F11/10 ,  H03M13/11 ,  H03M13/41 ,  G11C29/52

CPC分类号： H03M13/4146 ,  G06F11/1072 ,  G11C7/04 ,  G11C29/52 ,  G11C2029/0411 ,  H03M13/1111 ,  H03M13/116 ,  H03M13/23 ,  H03M13/4138 ,  H03M13/635

摘要： A controller for a solid state drive is proposed. The solid state drive comprises memory cells each one for storing a symbol among a plurality of possible symbols that the memory cell is designed to store. The controller comprises: an encoding unit for encoding information bits into encoded bits; a mapping unit for mapping the encoded bits into said symbols, wherein said symbols are determined based on a plurality of allowed symbols that the memory cells are allowed to store, said plurality of allowed symbols being a subset of the plurality of the possible symbols such that a plurality of forbidden symbols not allowed to be stored in the memory cells are defined among the plurality of the possible symbols, a demapping unit for demapping read symbols and for providing an indication of the reliability of the read symbols based on said plurality of forbidden symbols, and a soft decoding unit for soft decoding the read symbols according to said indication of the reliability of the read symbols thereby obtaining said information bits.

公开(公告)号：US10395754B2

公开(公告)日：2019-08-27

申请号：US15076409

申请日：2016-03-21

申请人： NandEXT S.r.l.

发明人： Margherita Maffeis

IPC分类号： H03M13/45 ,  G11C29/52 ,  G11C11/56 ,  G06F11/10 ,  H03M13/11 ,  H03M13/37 ,  H03M13/00 ,  G11C29/04

摘要： A method is proposed for decoding read bits including information bits from memory cells of a solid state drive. The method comprises determining a reliability indication indicative of a reliability of the read bits, and iterating the following sequence of steps: soft decoding the read bits based on said reliability indication in order to obtain said information bits, determining at least one among a time indication indicative of a time elapsed since a last writing of the memory cells and a temperature indication indicative of a temperature of the memory cells, and applying at least one among said time indication and said temperature indication to said reliability indication. A corresponding solid state drive is also proposed.