TRANSPOSED DELAY LINE OSCILLATOR AND METHOD

    公开(公告)号:US20220329239A1

    公开(公告)日:2022-10-13

    申请号:US17634590

    申请日:2019-08-13

    IPC分类号: H03K5/1252 H03K5/14 H03D7/00

    摘要: A transposed delay line oscillator including a mode selection filter and a transposed delay line is provided. An output of the transposed delay line is coupled to an input of the mode selection filter to establish an oscillator loop. Based on the transposed delay line output, the mode selection filter generates a mode selection signal including an isolated oscillatory mode, in a Radio Frequency (RF) band. The transposed delay line receives the mode selection signal for transposition to an intermediate frequency of an intermediate frequency (IF) delay line. The IF delay line includes a delay filter and a phase noise suppression loop configured to suppress de-correlated transposition phase noise resulting from a delay of the delay filter. Suppression of phase noise in the IF delay line enables cancellation of transposition phase noise when transposing the IF delay line output to the RF band.

    HIGH STABILITY OPTOELECTRONIC OSCILLATOR AND METHOD

    公开(公告)号:US20220278648A1

    公开(公告)日:2022-09-01

    申请号:US17634602

    申请日:2020-08-13

    摘要: An optoelectronic oscillator (OEO) including a drift compensation circuit is provided. The OEO includes a set of optical domain components communicatively coupled with a set of RF domain components. The RF domain components include a mode selection filter, a phase locked loop (PLL) and a drift compensation circuit communicatively coupled between the mode selection filter and the PLL. The mode selection filter provides a mode selection result to the drift compensation circuit. The drift compensation circuit phase modulates the mode selection result in a vector based coordinate system to maintain a drift compensated mode selection result within a locking bandwidth of the PLL, and to minimize phase shifting from accumulating phase drift. The PLL detects a phase difference between the drift compensated mode selection result and a reference signal, for use in maintaining the PLL in a phase lock with the reference signal, in particular over wide operational temperature ranges.

    RADAR ANTENNA SYSTEM AND METHOD
    3.
    发明申请

    公开(公告)号:US20210203081A1

    公开(公告)日:2021-07-01

    申请号:US17058382

    申请日:2019-05-24

    摘要: A RADAR antenna system and method are provided. In an implementation, the system includes a base and first and second antennas configured to transmit independent first and second antenna beams, respectively. The first and second antennas are each coupled to the base so as to provide a common rotational axis for the first and second antennas. An antenna position controller is configured to independently control first and second transmission positions associated with the first and second antennas, respectively. Two different antenna technologies can be used, for example one for providing communications capability and the other for providing tracking capability. Other implementations include four or more antennas configured to transmit beams at similar or different frequencies. Improvements in scan rate proportional to the number of antennas are achieved compared to that achievable with a single beam, without an increase in the rotation rate of the antenna system.

    PHASE LOCKED OSCILLATOR AND METHOD
    4.
    发明公开

    公开(公告)号:US20240171126A1

    公开(公告)日:2024-05-23

    申请号:US18551908

    申请日:2022-03-28

    IPC分类号: H03B5/04 H03L7/099

    摘要: An oscillator and method for maintaining a phase lock is provided. The oscillator may include an oscillator input port for receiving a reference signal, an oscillator output port for outputting an oscillator output, an unlocked oscillator oscillating in an unlocked state and outputting at a resonance frequency configured to drift in response to changes in an operating environment, and a phase locked loop (PLL) including a mixer having an output port configured to output the unlocked oscillator output mixed with a local oscillator output, the mixer output port in communication with a phase frequency detector and the oscillator output port, and the phase frequency detector generating a control signal based on a detected phase difference between the reference signal and the mixer output wherein the control signal adjusts the local oscillator output to compensate for the resonance frequency drift of the unlocked oscillator when mixed with the unlocked oscillator output.

    DELAY DEVICE AND METHOD OF EMULATING RADAR SIGNAL PROPAGATION DELAYS

    公开(公告)号:US20220276371A1

    公开(公告)日:2022-09-01

    申请号:US17634592

    申请日:2020-08-13

    IPC分类号: G01S13/58 G01S7/40 G01S7/41

    摘要: A delay device includes a tuning network including first and second tuning components having frequency responses that overlap in an intermediate frequency band to provide a group delay response. A delay modifier is in communication with the tuning network and configured to provide an offset frequency as an input to the tuning network, and to electronically adjust a group delay value associated with the group delay response by varying the offset frequency. The difference between a frequency of an input reference signal and a local oscillator frequency produced by the delay modifier is substantially equal to an intermediate frequency of the tuning network. The tuning network and the delay modifier cooperate to transpose the reference signal at the reference frequency down to the IF band before passing through the first and second delay lines, and back up to the RF band after passing through the first and second delay lines.

    FREQUENCY AGILE BAND SELECT FILTER
    6.
    发明公开

    公开(公告)号:US20240007137A1

    公开(公告)日:2024-01-04

    申请号:US18344138

    申请日:2023-06-29

    IPC分类号: H04B1/00 H04B1/16

    CPC分类号: H04B1/0075 H04B1/16

    摘要: A filter, apparatus, system and method are provided for implementing a band select filter, for example a frequency agile band select filter. In an implementation, the filter includes two separate signal generators configured to provide different local oscillator signals to an input mixer and to an output mixer, resulting in the filter output frequency being different from the filter input frequency. This is in contrast to known approaches which use the same signal generator to drive both input and output mixers. The filter may include two bandpass filters, three mixers, and three signal generators, each signal generator uniquely associated with one of the mixers, and configured to provide bandwidth control. A system of filters may include a set of bandpass filters, a plurality of sets of mixers, and a plurality of sets of signal generators, each set of signal generators being associated with a different set of mixers.

    SYSTEM AND METHOD FOR IMPROVED RADAR SENSITIVITY

    公开(公告)号:US20210156978A1

    公开(公告)日:2021-05-27

    申请号:US17058421

    申请日:2019-05-24

    IPC分类号: G01S13/30 G01S7/02 G01S7/282

    摘要: A solid state RADAR antenna system is provided comprising at least one antenna configured to transmit a plurality of antenna beams. Each antenna beam is decoupled from each of the other plurality of antenna beams for transmitting in a blind range of a different antenna beam. Accordingly, in an implementation, the second antenna beam is transmitted so as to scan a first blind range associated with the first antenna beam. Decoupling antenna beams can be achieved using one or more of physical decoupling using different antennas, frequency decoupling using different bands and/or frequency multiplexing, or orthogonal polarization.

    LOW SPURIOUS SYNTHESIZER CIRCUIT AND METHOD
    8.
    发明申请
    LOW SPURIOUS SYNTHESIZER CIRCUIT AND METHOD 有权
    低密度合成器电路和方法

    公开(公告)号:US20150303929A1

    公开(公告)日:2015-10-22

    申请号:US14647949

    申请日:2012-11-29

    IPC分类号: H03L7/085 H03L7/099 H03L7/18

    摘要: An offset phase locked loop synthesizer comprising: an input; an output; a voltage controlled oscillator (VCO), the VCO output coupled to the synthesizer output; a phase frequency detector having a reference input, a feed-back input, and an output; a mixer having a first mixer input coupled to the synthesizer input and a second mixer input coupled to the VCO output; a first divider for frequency dividing a signal by a first value and having an input coupled to the mixer output and an output coupled to the second input of the phase frequency detector; a second divider for frequency dividing a signal by a second value and having an input coupled to the synthesizer input and an output coupled to the reference input of the phase frequency detector; and a low pass filter coupled between the output of the phase frequency detector and the VCO input.

    摘要翻译: 一种偏移锁相环合成器,包括:输入; 输出 压控振荡器(VCO),VCO输出耦合到合成器输出; 具有参考输入,反馈输入和输出的相位频率检测器; 具有耦合到所述合成器输入的第一混频器输入和耦合到所述VCO输出的第二混频器输入的混频器; 第一分频器,用于将信号分频第一值并具有耦合到混频器输出的输入和耦合到相位频率检测器的第二输入的输出; 第二分频器,用于将信号分频第二值并具有耦合到合成器输入的输入和耦合到相位频率检测器的参考输入的输出; 以及耦合在相位频率检测器的输出端和VCO输入端之间的低通滤波器。

    ANTENNA ICE LOADING SENSOR AND METHOD

    公开(公告)号:US20220317244A1

    公开(公告)日:2022-10-06

    申请号:US17633830

    申请日:2020-08-10

    IPC分类号: G01S7/40 G01B15/02 H01Q19/00

    摘要: Disclosed herein is a system and method for determining a thickness of ice on Radio Frequency (RF) systems The system includes a sensor unit for use in determining the thickness of ice on a surface of a RADAR system having a RADAR antenna, the sensor unit including a sensor unit antenna tunable to a harmonic of a RADAR antenna signal, the harmonic having a frequency within an ice absorption band, wherein the sensor unit antenna emits the harmonic at a first signal strength; and, a sensor unit receiver communicatively coupled to the sensor unit antenna and configured to detect a second signal strength of the harmonic received by the sensor unit antenna.

    DIGITALLY COMPENSATED PHASE LOCKED OSCILLATOR
    10.
    发明申请
    DIGITALLY COMPENSATED PHASE LOCKED OSCILLATOR 有权
    数字补偿相位锁定振荡器

    公开(公告)号:US20160365865A1

    公开(公告)日:2016-12-15

    申请号:US15038891

    申请日:2013-11-25

    IPC分类号: H03L7/099 H03L7/16 H03L1/02

    CPC分类号: H03L7/0991 H03L1/026 H03L7/16

    摘要: A digitally compensated phase locked oscillator (DCPLO) is disclosed herein. The DCPLO comprises: a DCPLO input for receiving a reference signal at a known frequency; a DCPLO output for outputting a signal at a desired frequency; a phased locked loop (PLL), the phased locked loop comprising: a phase frequency detector, an oscillator, and a PLL output coupled to the output; a first direct digital synthesizer (DDS), the first DDS having an output coupled to the PLL to supply a DDS signal to the PLL for adjusting the frequency within the PLL so as to maintain phase lock over the operating temperature; a temperature sensor; and a processor coupled to the first DDS, the phase frequency detector, and the temperature sensor, the processor configured to set the frequency of the first DDS according to a temperature sensed by the temperature sensor.

    摘要翻译: 本文公开了数字补偿锁相振荡器(DCPLO)。 DCPLO包括:用于以已知频率接收参考信号的DCPLO输入; 用于以期望频率输出信号的DCPLO输出; 相位锁定环路(PLL),所述锁相环路包括:相位频率检测器,振荡器和耦合到所述输出端的PLL输出; 第一直接数字合成器(DDS),第一DDS具有耦合到PLL的输出端以向PLL提供DDS信号以调整PLL内的频率,以便在工作温度下保持相位锁定; 温度传感器; 以及耦合到所述第一DDS,所述相位频率检测器和所述温度传感器的处理器,所述处理器被配置为根据由所述温度传感器感测的温度来设置所述第一DDS的频率。