Semiconductor integrated circuit
    2.
    发明授权
    Semiconductor integrated circuit 有权
    半导体集成电路

    公开(公告)号:US07193929B2

    公开(公告)日:2007-03-20

    申请号:US11446219

    申请日:2006-06-05

    IPC分类号: G11C8/18

    摘要: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.

    摘要翻译: 半导体集成电路包括存储电路,基于存储电路中保存的控制信息产生内部时钟信号的振荡电路,以及产生控制信息的逻辑电路,该控制信息使内部时钟信号的频率与 外部时钟信号的频率。 内部时钟信号用于内部电路的同步操作。 即使由于过程变化而在振荡电路的振荡特性中出现误差(不期望的变化),也可能使内部时钟信号频率与对应于目标频率的外部时钟信号频率一致,而不需要外部 晶体振荡器的附件和外部时钟信号的输入。

    Semiconductor Integrated Circuit
    3.
    发明申请
    Semiconductor Integrated Circuit 审中-公开
    半导体集成电路

    公开(公告)号:US20080309383A1

    公开(公告)日:2008-12-18

    申请号:US12107069

    申请日:2008-04-21

    IPC分类号: H03L7/00

    摘要: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.

    摘要翻译: 半导体集成电路包括存储电路,基于存储电路中保存的控制信息产生内部时钟信号的振荡电路,以及产生控制信息的逻辑电路,该控制信息使内部时钟信号的频率与 外部时钟信号的频率。 内部时钟信号用于内部电路的同步操作。 即使由于过程变化而在振荡电路的振荡特性中出现误差(不期望的变化),也可能使内部时钟信号频率与对应于目标频率的外部时钟信号频率一致,而不需要外部 晶体振荡器的附件和外部时钟信号的输入。

    Semiconductor integrated circuit
    4.
    发明授权
    Semiconductor integrated circuit 有权
    半导体集成电路

    公开(公告)号:US07382681B2

    公开(公告)日:2008-06-03

    申请号:US11708346

    申请日:2007-02-21

    IPC分类号: G11C8/00

    摘要: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.

    摘要翻译: 半导体集成电路包括存储电路,基于存储电路中保存的控制信息产生内部时钟信号的振荡电路,以及产生控制信息的逻辑电路,该控制信息使内部时钟信号的频率与 外部时钟信号的频率。 内部时钟信号用于内部电路的同步操作。 即使由于过程变化而在振荡电路的振荡特性中出现误差(不期望的变化),也可能使内部时钟信号频率与对应于目标频率的外部时钟信号频率一致,而不需要外部 晶体振荡器的附件和外部时钟信号的输入。

    Semiconductor integrated circuit
    6.
    发明授权
    Semiconductor integrated circuit 有权
    半导体集成电路

    公开(公告)号:US07061825B2

    公开(公告)日:2006-06-13

    申请号:US10867013

    申请日:2004-06-15

    IPC分类号: G11C8/00

    摘要: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.

    摘要翻译: 半导体集成电路包括存储电路,基于存储电路中保存的控制信息产生内部时钟信号的振荡电路,以及产生控制信息的逻辑电路,该控制信息使内部时钟信号的频率与 外部时钟信号的频率。 内部时钟信号用于内部电路的同步操作。 即使由于过程变化而在振荡电路的振荡特性中出现误差(不期望的变化),也可能使内部时钟信号频率与对应于目标频率的外部时钟信号频率一致,而不需要外部 晶体振荡器的附件和外部时钟信号的输入。

    Microcomputer and microprocessor having flash memory operable from single external power supply
    10.
    发明授权
    Microcomputer and microprocessor having flash memory operable from single external power supply 失效
    具有从单个外部电源可操作的闪存的微计算机和微处理器

    公开(公告)号:US07385869B2

    公开(公告)日:2008-06-10

    申请号:US11797579

    申请日:2007-05-04

    IPC分类号: G11C7/00

    摘要: A data processing apparatus supplied a first voltage from outside, includes a CPU, a first voltage generating circuit, a second voltage generating circuit, a clock generating circuit, and, a nonvolatile memory which can be accessed by the CPU. The first voltage generating circuit generates a second voltage, a voltage level of which is lower than that of the first voltage. The clock generating circuit is supplied the second voltage from the first voltage generating circuit and generates a clock signal, and the second voltage generating circuit is supplied the second voltage from the first voltage generating circuit and the clock signal from the clock generating circuit, and generates a second voltage, a voltage level of which is higher than that of the first voltage, for supplying to the nonvolatile memory.

    摘要翻译: 从外部提供第一电压的数据处理装置包括CPU,第一电压产生电路,第二电压产生电路,时钟发生电路和可被CPU访问的非易失性存储器。 第一电压产生电路产生其电压电平低于第一电压的第二电压。 时钟发生电路从第一电压产生电路提供第二电压并产生时钟信号,并且第二电压产生电路从第一电压产生电路提供第二电压和来自时钟发生电路的时钟信号,并产生 其电压电平高于第一电压的第二电压,用于提供给非易失性存储器。