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    Nonvolatile semiconductor memory device
    1.
    发明授权
    Nonvolatile semiconductor memory device 有权
    非易失性半导体存储器件

    公开(公告)号：US08339862B2

    公开(公告)日：2012-12-25

    申请号：US12343552

    申请日：2008-12-24

    申请人： Natsuo Aiika ,  Shoii Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    发明人： Natsuo Aiika ,  Shoii Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    IPC分类号： G11C16/06 ,  G11C11/34 ,  H01L29/792

    CPC分类号： G11C16/10 ,  G11C16/0483 ,  G11C16/12 ,  H01L27/115 ,  H01L27/11524

    摘要： According to an aspect of the present invention, it is provided: a nonvolatile semiconductor memory device comprising: a plurality of bit lines arranged in a first direction; a plurality of source lines arranged in the first direction, the plurality of source lines being parallel to the plurality of bit lines, the plurality of source lines being distinct from the plurality of bit lines; a plurality of memory gate lines arranged in a second direction perpendicular to the first direction; a plurality of memory cells arranged in a matrix, each of the plurality of memory cells including a p type MIS nonvolatile transistor having a first terminal, a second terminal, a channel between the first terminal and the second terminal, a gate insulation film formed on the channel, a gate electrode connected to one corresponding memory gate line of the plurality of memory gate lines, and a carrier storage layer formed between the gate insulation film and the gate electrode, the first terminal being connected to one corresponding bit line of the plurality of bit lines and the second terminal being connected to one corresponding source line of the plurality of source lines.

    摘要翻译： 根据本发明的一个方面，提供一种非易失性半导体存储器件，包括：沿第一方向布置的多个位线; 沿所述第一方向布置的多条源极线，所述多条源极线与所述多个位线平行，所述多个源极线与所述多个位线不同; 沿垂直于第一方向的第二方向布置的多个存储栅极线; 多个存储单元，以矩阵形式布置，所述多个存储单元中的每一个包括具有第一端子，第二端子，第一端子和第二端子之间的通道的ap型MIS非易失性晶体管，形成在栅极绝缘膜上的栅极绝缘膜 连接到所述多个存储栅极线中的一个对应的存储栅极线的栅极，以及形成在所述栅极绝缘膜和所述栅电极之间的载流子存储层，所述第一端子连接到所述多个栅极线中的一个相应的位线 位线，并且所述第二端子连接到所述多个源极线中的一个对应的源极线。

    Nonvolatile Semiconductor Memory Device
    2.
    发明申请
    Nonvolatile Semiconductor Memory Device 有权
    非易失性半导体存储器件

    公开(公告)号：US20090161439A1

    公开(公告)日：2009-06-25

    申请号：US12343552

    申请日：2008-12-24

    申请人： Natsuo Aiika ,  Shoii Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    发明人： Natsuo Aiika ,  Shoii Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    IPC分类号： G11C16/06 ,  G11C11/34 ,  H01L29/792

    CPC分类号： G11C16/10 ,  G11C16/0483 ,  G11C16/12 ,  H01L27/115 ,  H01L27/11524

    摘要： According to an aspect of the present invention, it is provided: a nonvolatile semiconductor memory device comprising: a plurality of bit lines arranged in a first direction; a plurality of source lines arranged in the first direction, the plurality of source lines being parallel to the plurality of bit lines, the plurality of source lines being distinct from the plurality of bit lines; a plurality of memory gate lines arranged in a second direction perpendicular to the first direction; a plurality of memory cells arranged in a matrix, each of the plurality of memory cells including a p type MIS nonvolatile transistor having a first terminal, a second terminal, a channel between the first terminal and the second terminal, a gate insulation film formed on the channel, a gate electrode connected to one corresponding memory gate line of the plurality of memory gate lines, and a carrier storage layer formed between the gate insulation film and the gate electrode, the first terminal being connected to one corresponding bit line of the plurality of bit lines and the second terminal being connected to one corresponding source line of the plurality of source lines.

    摘要翻译： 根据本发明的一个方面，提供一种非易失性半导体存储器件，包括：沿第一方向布置的多个位线; 沿所述第一方向布置的多条源极线，所述多条源极线与所述多个位线平行，所述多个源极线与所述多个位线不同; 沿垂直于第一方向的第二方向布置的多个存储栅极线; 多个存储单元，以矩阵形式布置，所述多个存储单元中的每一个包括具有第一端子，第二端子，第一端子和第二端子之间的通道的ap型MIS非易失性晶体管，形成在栅极绝缘膜上的栅极绝缘膜 连接到所述多个存储栅极线中的一个对应的存储栅极线的栅极，以及形成在所述栅极绝缘膜和所述栅电极之间的载流子存储层，所述第一端子连接到所述多个栅极线中的一个相应的位线 位线，并且所述第二端子连接到所述多个源极线中的一个对应的源极线。

    Non-volatile semiconductor memory device
    3.
    发明授权
    Non-volatile semiconductor memory device 有权
    非易失性半导体存储器件

    公开(公告)号：US08106443B2

    公开(公告)日：2012-01-31

    申请号：US12246193

    申请日：2008-10-06

    申请人： Natsuo Ajika ,  Shoji Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    发明人： Natsuo Ajika ,  Shoji Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    IPC分类号： H01L29/792 ,  H01L21/336

    CPC分类号： H01L27/11568 ,  G11C16/0441 ,  G11C16/0491 ,  H01L21/26586 ,  H01L29/792

    摘要： A non-volatile semiconductor device includes an n type well formed in a semiconductor substrate having a surface, the surface having a plurality of stripe shaped grooves and a plurality of stripe shaped ribs, a plurality of stripe shaped p type diffusion regions formed in upper parts of each of the plurality of ribs, the plurality of stripe shaped p type diffusion regions being parallel to a longitudinal direction of the ribs, a tunneling insulation film formed on the grooves and the ribs, a charge storage layer formed on the tunneling insulating film, a gate insulation film formed on the charge storage layer, and a plurality of stripe shaped conductors formed on the gate insulating film, the plurality of stripe shaped conductors arranged in a direction intersecting the longitudinal direction of the ribs with a predetermined interval wherein an impurity diffusion structure in the ribs are asymmetric.

    摘要翻译： 非易失性半导体器件包括在具有表面的半导体衬底中形成的n型阱，表面具有多个条形槽和多个条状肋，多个条形p型扩散区形成在上部 所述多个条状p型扩散区域与所述肋的长度方向平行，形成在所述槽和所述肋上的隧道绝缘膜，形成在所述隧道绝缘膜上的电荷存储层， 形成在电荷存储层上的栅极绝缘膜和形成在栅极绝缘膜上的多个条状导体，所述多个条状导体沿着与肋的纵向相交的方向以预定间隔布置，其中杂质扩散 肋骨中的结构是不对称的。

    Non-volatile semiconductor memory device and manufacturing method thereof
    4.
    发明授权
    Non-volatile semiconductor memory device and manufacturing method thereof 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US08492826B2

    公开(公告)日：2013-07-23

    申请号：US12782378

    申请日：2010-05-18

    申请人： Natsuo Ajika ,  Shoji Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    发明人： Natsuo Ajika ,  Shoji Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    IPC分类号： H01L29/788

    CPC分类号： H01L29/792 ,  G11C16/0441 ,  G11C16/0491 ,  H01L21/26586 ,  H01L27/11568 ,  H01L29/66833

    摘要： A non-volatile semiconductor device includes an n type well formed in a semiconductor substrate having a surface, the surface having a plurality of stripe shaped grooves and a plurality of stripe shaped ribs, a plurality of stripe shaped p type diffusion regions formed in upper parts of each of the plurality of ribs, the plurality of stripe shaped p type diffusion regions being parallel to a longitudinal direction of the ribs, a tunneling insulation film formed on the grooves and the ribs, a charge storage layer formed on the tunneling insulating film, a gate insulation film formed on the charge storage layer, and a plurality of stripe shaped conductors formed on the gate insulating film, the plurality of stripe shaped conductors arranged in a direction intersecting the longitudinal direction of the ribs with a predetermined interval wherein an impurity diffusion structure in the ribs are asymmetric.

    摘要翻译： 非易失性半导体器件包括在具有表面的半导体衬底中形成的n型阱，表面具有多个条形槽和多个条状肋，多个条形p型扩散区形成在上部 所述多个条状p型扩散区域与所述肋的长度方向平行，形成在所述槽和所述肋上的隧道绝缘膜，形成在所述隧道绝缘膜上的电荷存储层， 形成在电荷存储层上的栅极绝缘膜和形成在栅极绝缘膜上的多个条状导体，所述多个条状导体沿着与肋的纵向相交的方向以预定间隔布置，其中杂质扩散 肋骨中的结构是不对称的。

    NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
    7.
    发明申请
    NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE 审中-公开
    非易失性半导体存储器件

    公开(公告)号：US20120112265A1

    公开(公告)日：2012-05-10

    申请号：US13350703

    申请日：2012-01-13

    申请人： Natsuo AJIKA ,  Shoji Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    发明人： Natsuo AJIKA ,  Shoji Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    IPC分类号： H01L29/792 ,  H01L21/336

    CPC分类号： H01L27/11568 ,  G11C16/0441 ,  G11C16/0491 ,  H01L21/26586 ,  H01L29/792

    摘要： A non-volatile semiconductor device includes an n type well formed in a semiconductor substrate having a surface, the surface having a plurality of stripe shaped grooves and a plurality of stripe shaped ribs, a plurality of stripe shaped p type diffusion regions formed in upper parts of each of the plurality of ribs, the plurality of stripe shaped p type diffusion regions being parallel to a longitudinal direction of the ribs, a tunneling insulation film formed on the grooves and the ribs, a charge storage layer formed on the tunneling insulating film, a gate insulation film formed on the charge storage layer, and a plurality of stripe shaped conductors formed on the gate insulating film, the plurality of stripe shaped conductors arranged in a direction intersecting the longitudinal direction of the ribs with a predetermined interval wherein an impurity diffusion structure in the ribs are asymmetric.

    摘要翻译： 非易失性半导体器件包括在具有表面的半导体衬底中形成的n型阱，表面具有多个条形槽和多个条状肋，多个条形p型扩散区形成在上部 所述多个条状p型扩散区域与所述肋的长度方向平行，形成在所述槽和所述肋上的隧道绝缘膜，形成在所述隧道绝缘膜上的电荷存储层， 形成在电荷存储层上的栅极绝缘膜和形成在栅极绝缘膜上的多个条状导体，所述多个条状导体沿着与肋的纵向相交的方向以预定间隔布置，其中杂质扩散 肋骨中的结构是不对称的。

    Non-Volatile Semiconductor Memory Device
    8.
    发明申请
    Non-Volatile Semiconductor Memory Device 有权
    非易失性半导体存储器件

    公开(公告)号：US20090090961A1

    公开(公告)日：2009-04-09

    申请号：US12246193

    申请日：2008-10-06

    申请人： Natsuo Ajika ,  Shoji Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    发明人： Natsuo Ajika ,  Shoji Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    IPC分类号： H01L29/792 ,  H01L21/336

    CPC分类号： H01L27/11568 ,  G11C16/0441 ,  G11C16/0491 ,  H01L21/26586 ,  H01L29/792

    摘要： A non-volatile semiconductor device includes an n type well formed in a semiconductor substrate having a surface, the surface having a plurality of stripe shaped grooves and a plurality of stripe shaped ribs, a plurality of stripe shaped p type diffusion regions formed in upper parts of each of the plurality of ribs, the plurality of stripe shaped p type diffusion regions being parallel to a longitudinal direction of the ribs, a tunneling insulation film formed on the grooves and the ribs, a charge storage layer formed on the tunneling insulating film, a gate insulation film formed on the charge storage layer, and a plurality of stripe shaped conductors formed on the gate insulating film, the plurality of stripe shaped conductors arranged in a direction intersecting the longitudinal direction of the ribs with a predetermined interval wherein an impurity diffusion structure in the ribs are asymmetric.

    摘要翻译： 非易失性半导体器件包括在具有表面的半导体衬底中形成的n型阱，表面具有多个条形槽和多个条状肋，多个条形p型扩散区形成在上部 所述多个条状p型扩散区域与所述肋的长度方向平行，形成在所述槽和所述肋上的隧道绝缘膜，形成在所述隧道绝缘膜上的电荷存储层， 形成在电荷存储层上的栅极绝缘膜和形成在栅极绝缘膜上的多个条状导体，所述多个条状导体沿着与肋的纵向相交的方向以预定间隔布置，其中杂质扩散 肋骨中的结构是不对称的。

    Non-Volatile Semiconductor Memory Device and Manufacturing Method Thereof
    9.
    发明申请
    Non-Volatile Semiconductor Memory Device and Manufacturing Method Thereof 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US20100283099A1

    公开(公告)日：2010-11-11

    申请号：US12782378

    申请日：2010-05-18

    申请人： Natsuo Ajika ,  Shoji Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    发明人： Natsuo Ajika ,  Shoji Shukuri ,  Satoshi Shimizu ,  Taku Ogura

    IPC分类号： H01L29/792

    CPC分类号： H01L29/792 ,  G11C16/0441 ,  G11C16/0491 ,  H01L21/26586 ,  H01L27/11568 ,  H01L29/66833

    摘要： A non-volatile semiconductor device includes an n type well formed in a semiconductor substrate having a surface, the surface having a plurality of stripe shaped grooves and a plurality of stripe shaped ribs, a plurality of stripe shaped p type diffusion regions formed in upper parts of each of the plurality of ribs, the plurality of stripe shaped p type diffusion regions being parallel to a longitudinal direction of the ribs, a tunneling insulation film formed on the grooves and the ribs, a charge storage layer formed on the tunneling insulating film, a gate insulation film formed on the charge storage layer, and a plurality of stripe shaped conductors formed on the gate insulating film, the plurality of stripe shaped conductors arranged in a direction intersecting the longitudinal direction of the ribs with a predetermined interval wherein an impurity diffusion structure in the ribs are asymmetric.

    摘要翻译： 非易失性半导体器件包括在具有表面的半导体衬底中形成的n型阱，表面具有多个条形槽和多个条状肋，多个条形p型扩散区形成在上部 所述多个条状p型扩散区域平行于所述肋的纵向方向，形成在所述沟槽和所述肋上的隧道绝缘膜，形成在所述隧道绝缘膜上的电荷存储层， 形成在电荷存储层上的栅极绝缘膜和形成在栅极绝缘膜上的多个条状导体，所述多个条状导体沿着与肋的纵向相交的方向以预定间隔布置，其中杂质扩散 肋骨中的结构是不对称的。

    Cleaning composition and method for cleaning substrate for electronic device
    10.
    发明授权
    Cleaning composition and method for cleaning substrate for electronic device 有权
    用于清洁电子设备基板的清洁组合物和方法

    公开(公告)号：US08809247B2

    公开(公告)日：2014-08-19

    申请号：US12867468

    申请日：2009-02-13

    申请人： Makoto Hidaka ,  Taku Ogura

    发明人： Makoto Hidaka ,  Taku Ogura

    IPC分类号： C11D3/04 ,  H01L21/02 ,  C11D3/39 ,  C11D7/10 ,  C11D7/26 ,  C11D11/00 ,  H01L29/16

    CPC分类号： H01L21/02052 ,  C11D3/3947 ,  C11D7/10 ,  C11D7/265 ,  C11D11/0047 ,  H01L29/1608

    摘要： A cleaning composition which is capable of removing both organic soiling and particulate soiling adhered to a substrate for an electronic device with a high degree of cleanliness, and which also has minimal impact on the environment, as well as a method of cleaning a substrate for an electronic device. The present invention relates to a cleaning composition used for cleaning a substrate for an electronic device including a water-soluble salt (A) containing a transition metal, a chelating agent (B) and a peroxide (C), wherein the amount of the chelating agent (B) is not less than 0.5 molar equivalents relative to the amount of the water-soluble salt (A) containing a transition metal.

    摘要翻译： 一种清洁组合物，其能够除去附着在具有高清洁度的电子设备的基板上并且对环境影响最小的有机污染物和微粒污染物，以及清洁基板的方法， 电子设备。 本发明涉及一种清洗组合物，其用于清洗包含含有过渡金属的水溶性盐（A），螯合剂（B）和过氧化物（C））的电子器件用基材，其中螯合剂 试剂（B）相对于含有过渡金属的水溶性盐（A）的量不小于0.5摩尔当量。