摘要:
A turbo decoder control comprises an address generator for addressing systematic data, parity data, and systematic likelihood ratios according to a pre-determined memory mapping. The systematic data samples are accessed in the order required by the MAP decoding algorithm such that interleaving and de-interleaving functions in the MAP decoding algorithm are performed in real-time, i.e., without delay. Such memory-mapping in combination with data handling functions (e.g., multiplexing and combinatorial logic) minimizes memory requirements for the turbo decoder and allows for use of programmable interleavers, variable block lengths, and multiple code rates.
摘要:
A turbo decoder system utilizing a MAP decoding algorithm has a predetermined number of turbo decoder modules for decoding segments of a turbo code component code word in parallel, thereby expanding the block-length and data-rate capability of the turbo decoder system. Input data samples are provided to an interleaver/de-interleaver module wherein they are divided into segments of predetermined size, each segment being provided to a respective turbo decoder module. The outputs of each turbo decoder module are a posteriori probabilities which are re-ordered in the interleaver/de-interleaver module, segmented, and provided back to the turbo decoders as a priori information-bit probabilities. For the case of a turbo code comprising two component codes, the a posteriori information-bit probabilities are re-ordered according to the interleaver definition at the end of odd-numbered half iterations, while at the end of even-numbered half iterations, they are re-ordered according to the de-interleaver definition. Decoding continues until the desired number of iterations have been performed. Data decisions are made on the final a posteriori bit probability estimates.
摘要:
A high-speed turbo decoder utilizes a MAP decoding algorithm and includes a streamlined construction of functional units, or blocks, amenable to ASIC implementation. A gamma block provides symbol-by-symbol a posteriori state transition probability estimates. Two gamma probability function values are provided via selection switches to the alpha and beta blocks for calculating the alpha and beta probability function values, i.e., performing the alpha and beta recursions, respectively, in parallel, thus significantly increasing decoding speed. A scaling circuit monitors the values of the alpha and beta probability functions and prescribes a scale factor such that all such values at a trellis level remain within the precision limits of the system. A sigma block determines the a posteriori state transition probabilities (sigma values) and uses the sigma values to provide soft-decision outputs of the turbo decoder.
摘要:
A turbo decoder system utilizing a MAP decoding algorithm has a predetermined number of turbo decoder modules for decoding segments of a turbo code component code word in parallel, thereby expanding the block-length and data rate capability of the turbo decoder. Upon completion of any half iteration of the MAP decoding algorithm, the a posteriori bit probability estimates are provided to an interleave/de-interleave-and-convert-data function block wherein they are re-ordered, segmented, used to modify the original received data samples, and provided back to the respective turbo decoder modules as input data samples for the systematic bits. Decoding continues in this manner until a predetermined number of half iterations is performed, and data decisions are made on the final a posteriori estimates.
摘要:
A turbo decoder control comprises an address generator for addressing systematic data, parity data, and systematic likelihood ratios according to a pre-determined memory mapping. The systematic data samples are accessed in the order required by the MAP decoding algorithm such that interleaving and de-interleaving functions in the MAP decoding algorithm are performed in real-time, i.e., without delay. Such memory-mapping in combination with data handling functions (e.g., multiplexing and combinatorial logic) minimizes memory requirements for the turbo decoder and allows for use of programmable interleavers, variable block lengths, and multiple code rates.
摘要:
Forward and backward recursive calculations in a maximum a posteriori decoding process are performed in parallel processes, rather than sequentially, allowing the a posteriori transition probabilities to be calculated in the same time interval as the recursions, thereby reducing decoding latency and required memory.
摘要:
A feedback control for a turbo decoder controls the feedback between component decoders of the turbo decoder by substituting either a neutral value or a weighted value for the channel transition probabilities utilized by each component decoder during the iterative decoding process. A control switch selects either estimated channel transition probabilities, modifications of these values, or neutral values as the channel transition probabilities utilized by the next component decoder in the subsequent decoding iteration.
摘要:
In a communications system, a trellis code word is segmented by both the encoder and a segmented MAP decoder. The segmented MAP decoder operates on code word segments as if they were individual code words and takes advantage of knowing the state of the encoder at specified times to reduce decoding latency and required memory. In a turbo coding system, for example, coding gain is maintained by interleaving the information bits across the segments of a component code word.
摘要:
A feedback control for a turbo decoder controls the feedback between component decoders by modifying updated a priori probabilities calculated by one component decoder and used as inputs to another component decoder during the decoding process, resulting in a significant performance advantage. A feedback control switch selects either previously estimated a posteriori probabilities, modifications of these values, or neutral values as a priori probabilities utilized by the next component decoder.
摘要:
The present techniques provide systems and methods for modulation coding of data on optical disks, such as holographic data disks, and techniques for reading that data back from the disks. The techniques involve parsing a bit stream into a sequence of individual bit-patterns, and then using the individual bit patterns to select a symbol, or matrix, from a lookup table of previously selected matrices. The symbols are selected according to predetermined criteria that may help make the disk more resistant to interferences and errors, such as surface scratches, and the like. For example, criteria that may be used to select the symbols are the number of reflective and non-reflective regions within each matrix, and the number of sequential reflective regions, among others. The symbols may be written to the disk in a two-dimensional fashion, e.g., across adjacent tracks, or in a three-dimensional fashion, e.g., across adjacent data layers.