Radio signal analysis
    2.
    发明申请
    Radio signal analysis 审中-公开
    无线电信号分析

    公开(公告)号:US20080171517A1

    公开(公告)日:2008-07-17

    申请号:US11648849

    申请日:2006-12-29

    IPC分类号: G01S7/40 H04B17/00

    摘要: In some embodiments, a radio transmitter assembly comprises a test signal generator module to generate a first instance of a test signal, the test signal comprising a code, a test signal receiver module which receives the code, a signal combiner to combine the first instance of the test signal with a real signal to create a combined signal, a radio signal generator to generate a radio signal from the combined signal, a signal separator to separate a second instance of the test signal from the radio signal, and comparator logic in the test signal receiver module to compare the code with a code embedded in the second instance of the test signal in the test signal receiver module.

    摘要翻译: 在一些实施例中,无线电发射器组件包括测试信号发生器模块以产生测试信号的第一实例,测试信号包括代码,接收代码的测试信号接收器模块,组合信号的第一实例 具有实信号的测试信号以产生组合信号,无线电信号发生器从组合信号产生无线电信号,信号分离器将测试信号的第二个实例与无线电信号分开,以及测试中的比较器逻辑 信号接收器模块,用于将代码与嵌入在测试信号接收器模块中的测试信号的第二实例中的代码进行比较。

    AGC module and method for controlling noise figure and intermodulation characteristics therein
    3.
    发明授权
    AGC module and method for controlling noise figure and intermodulation characteristics therein 失效
    AGC模块及其中控制噪声系数和互调特性的方法

    公开(公告)号:US07626457B2

    公开(公告)日:2009-12-01

    申请号:US11863701

    申请日:2007-09-28

    IPC分类号: H03F3/45

    摘要: An Automatic Gain Control (AGC) module for controlling Noise Figure (NF) and IM characteristics therein is disclosed. The AGC module comprises a plurality of AGC stages. Each AGC stage comprises a differential amplifier circuit, an input signal transistor and a current-steering circuit. Differential amplifier circuits of the plurality of AGC stages receive control signals at their differential inputs and their output is connected to a common load. The input signal transistors of the plurality of AGC stages receive a common input signal and is further coupled to the differential amplifier circuit and the current-steering circuit. The current-steering circuits and the control signals at the differential amplifier circuits control gain of the each AGC stage of the plurality of AGC stage, which is used to control the NF and the IM characteristics.

    摘要翻译: 公开了一种用于控制噪声系数(NF)和IM特性的自动增益控制(AGC)模块。 AGC模块包括多个AGC级。 每个AGC级包括差分放大器电路,输入信号晶体管和电流 - 转向电路。 多个AGC级的差分放大器电路在其差分输入处接收控制信号,并且其输出连接到公共负载。 多个AGC级的输入信号晶体管接收公共输入信号,并且还耦合到差分放大器电路和电流转向电路。 差动放大器电路中的电流导向电路和控制信号控制用于控制NF和IM特性的多个AGC级的每个AGC级的增益。

    AGC MODULE AND METHOD FOR CONTROLLING NOISE FIGURE AND INTERMODULATION CHARACTERISTICS THEREIN
    4.
    发明申请
    AGC MODULE AND METHOD FOR CONTROLLING NOISE FIGURE AND INTERMODULATION CHARACTERISTICS THEREIN 失效
    用于控制噪声图的AGC模块和方法及其互连特性

    公开(公告)号:US20090085660A1

    公开(公告)日:2009-04-02

    申请号:US11863701

    申请日:2007-09-28

    IPC分类号: H03F3/45

    摘要: An Automatic Gain Control (AGC) module for controlling Noise Figure (NF) and IM characteristics therein is disclosed. The AGC module comprises a plurality of AGC stages. Each AGC stage comprises a differential amplifier circuit, an input signal transistor and a current-steering circuit. Differential amplifier circuits of the plurality of AGC stages receive control signals at their differential inputs and their output is connected to a common load. The input signal transistors of the plurality of AGC stages receive a common input signal and is further coupled to the differential amplifier circuit and the current-steering circuit. The current-steering circuits and the control signals at the differential amplifier circuits control gain of the each AGC stage of the plurality of AGC stage, which is used to control the NF and the IM characteristics.

    摘要翻译: 公开了一种用于控制噪声系数(NF)和IM特性的自动增益控制(AGC)模块。 AGC模块包括多个AGC级。 每个AGC级包括差分放大器电路,输入信号晶体管和电流 - 转向电路。 多个AGC级的差分放大器电路在其差分输入处接收控制信号,并且其输出连接到公共负载。 多个AGC级的输入信号晶体管接收公共输入信号,并且还耦合到差分放大器电路和电流转向电路。 差动放大器电路中的电流导向电路和控制信号控制用于控制NF和IM特性的多个AGC级的每个AGC级的增益。

    Pulse generator, optical disk writer and tuner
    5.
    发明授权
    Pulse generator, optical disk writer and tuner 有权
    脉冲发生器,光盘刻录机和调谐器

    公开(公告)号:US07327179B2

    公开(公告)日:2008-02-05

    申请号:US11466242

    申请日:2006-08-22

    IPC分类号: G06F1/04

    摘要: A pulse generator is provided for generating pulses with a selectable variable width and/or delay. The pulse generator comprises an oscillator and a selecting arrangement for selecting how many of a first group of delay elements are connected in series for delaying the oscillator signal. Identical delay elements are connected in series to form a second group. A measuring circuit repeatedly measures the delay provided by the second group, for example providing output pulses whose width or duration is equal to the delay. A reference pulse generator generates a series of reference pulses, each of which is a predetermined fraction of the oscillator period. A control circuit compares the measurement and reference pulses to generate an error signal that is fed back to timing delay control inputs of all the delay elements such that the widths of the measurement and reference pulses are made substantially equal to each other.

    摘要翻译: 提供脉冲发生器用于产生具有可选择的可变宽度和/或延迟的脉冲。 脉冲发生器包括振荡器和选择装置,用于选择串联连接多少第一组延迟元件以延迟振荡器信号。 相同的延迟元件串联连接以形成第二组。 测量电路重复测量由第二组提供的延迟,例如提供其宽度或持续时间等于延迟的输出脉冲。 参考脉冲发生器产生一系列参考脉冲,每个参考脉冲是振荡器周期的预定分数。 控制电路比较测量和参考脉冲以产生反馈到所有延迟元件的定时延迟控制输入的误差信号,使得测量和参考脉冲的宽度彼此基本相等。

    System, apparatus and method to improve analog-to-digital converter output
    7.
    发明授权
    System, apparatus and method to improve analog-to-digital converter output 有权
    提高模数转换器输出的系统,装置和方法

    公开(公告)号:US09054720B2

    公开(公告)日:2015-06-09

    申请号:US13976329

    申请日:2012-04-19

    摘要: According to various embodiments, a system, an apparatus and a method are presented that relate to determining and correcting signal imbalances between output samples of an analog-to-digital (A-D) converter array (that may be implemented as part of a wideband ADC). A statistic module and correction module are associated with the A-D converter array. The statistic module is configured to receive digital samples from the plurality of A-D converters, and generate a statistical sample value for each A-D converter using a set of digital samples received therefrom. The correction module is configured to, for at least one of the plurality of A-D converters, determine an offset value by comparing the statistical sample value for the at least one of the plurality of A-D converters with a reference value, and apply the offset value to a digital sample from that at least one A-D converter to generate a corrected digital sample.

    摘要翻译: 根据各种实施例,提出了一种涉及确定和校正模数(AD)转换器阵列(可被实现为宽带ADC的一部分)的输出采样之间的信号不平衡的系统,装置和方法, 。 统计模块和校正模块与A-D转换器阵列相关联。 统计模块被配置为从多个A-D转换器接收数字样本,并且使用从其接收的一组数字样本为每个A-D转换器生成统计采样值。 校正模块被配置为,对于多个AD转换器中的至少一个,通过将多个AD转换器中的至少一个AD转换器的统计采样值与参考值进行比较来确定偏移值,并将偏移值应用于 来自该至少一个AD转换器的数字样本以产生经校正的数字样本。

    Methods and arrangements for high-speed digital-to-analog conversion
    8.
    发明授权
    Methods and arrangements for high-speed digital-to-analog conversion 有权
    高速数模转换的方法和布置

    公开(公告)号:US08823568B2

    公开(公告)日:2014-09-02

    申请号:US13631858

    申请日:2012-09-28

    IPC分类号: H03M1/66

    CPC分类号: H03M1/662

    摘要: Embodiments may comprise logic such as hardware and/or code for high-speed digital-to-analog conversion of signals. Many embodiments comprise a demultiplexer to distribute sets of bits to digital-to-analog converters, the digital-to-analog converters to receive the sets of bits and the operate concurrently to convert the sets of bits from digital representations of signal segments to output analog signal segments, and an interleaver to interleave the analog signal segments from each of digital-to-analog converters in the sequence to generate an analog signal. In many embodiments, the interleaver is adapted to interleave the analog signal segments by latching magnitudes of each of the analog signal segments to an interleaved output near ends of clock cycles to attenuate non-linearities in the magnitudes of each of the analog signal segments when the magnitudes are output.

    摘要翻译: 实施例可以包括诸如用于信号的高速数模转换的硬件和/或代码的逻辑。 许多实施例包括解复用器以将位集合分配给数模转换器,数模转换器用于接收位组并且同时操作以将位组从信号段的数字表示转换为输出模拟 信号段和交织器,以在序列中对来自每个数模转换器的模拟信号段进行交织以产生模拟信号。 在许多实施例中,交织器适于通过将模拟信号段中的每一个的大小锁存到接近于时钟周期端的交错输出来对模拟信号段进行交织,以衰减每个模拟信号段的幅度中的非线性 输出大小。

    CORRECTING QUADRATURE CROSSTALK CONTAMINATION IN RECEIVERS
    9.
    发明申请
    CORRECTING QUADRATURE CROSSTALK CONTAMINATION IN RECEIVERS 有权
    修正接收器中的平台CROSSTALK污染

    公开(公告)号:US20110151818A1

    公开(公告)日:2011-06-23

    申请号:US12646513

    申请日:2009-12-23

    IPC分类号: H04B1/10

    CPC分类号: H04B1/28 H04L27/3863

    摘要: An apparatus, a method and a system for correcting a phase imbalance are described. Embodiments may measure the phase imbalance inherent in a tuner and use the imbalance measure to correct the output of the tuner. Embodiments may include a tone generator to produce a single frequency tone and a tuner to receive the single frequency tone and output an intermediate frequency. The intermediate frequency may be corrected by a correction loop. Other embodiments are described and claimed.

    摘要翻译: 描述了用于校正相位不平衡的装置,方法和系统。 实施例可以测量调谐器固有的相位不平衡,并使用不平衡度量来校正调谐器的输出。 实施例可以包括产生单个频率音调的音调发生器和用于接收单个频率音调并输出中频的调谐器。 中间频率可以通过校正回路来校正。 描述和要求保护其他实施例。

    QUADRATURE FREQUENCY CHANGER, TUNER AND MODULATOR
    10.
    发明申请
    QUADRATURE FREQUENCY CHANGER, TUNER AND MODULATOR 失效
    频率变换器,调谐器和调制器

    公开(公告)号:US20070042744A1

    公开(公告)日:2007-02-22

    申请号:US11464596

    申请日:2006-08-15

    IPC分类号: H04B1/26

    CPC分类号: H03D3/009

    摘要: A quadrature frequency changer comprising first and second mixers and a local oscillator and a tuner and modulator including the quadrature frequency changer are provided. The local oscillator provides first and second commutating signals which are nominally in phase-quadrature and includes an arrangement for changing the phase of the first commutating signal by 180° to provide a third commutating signal. The first mixer comprises first and second mixing stages for mixing an input signal with the first and second commutating signals and a summer for summing the mixer stage output signals. The second mixer comprises third and fourth mixing stages for mixing the same or a different input signal with the second and third commuting signals and a summer for summing the third and fourth mixer stage output signals.

    摘要翻译: 提供包括第一和第二混频器的正交变频器和包括正交变频器的本地振荡器和调谐器和调制器。 本地振荡器提供名义上是相位正交的第一和第二整流信号,并且包括用于将第一整流信号的相位改变180°以提供第三换向信号的装置。 第一混频器包括用于混合输入信号与第一和第二换向信号的第一和第二混频级和用于对混频级输出信号求和的加法器。 第二混频器包括用于混合相同或不同输入信号与第二和第三通勤信号的第三和第四混频级和用于对第三和第四混频级输出信号求和的加法器。