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    MEMORY DEVICE WITH ADAPTIVE CAPACITY
    2.
    发明申请
    MEMORY DEVICE WITH ADAPTIVE CAPACITY 有权
    具有适应能力的存储器件

    公开(公告)号：US20100157641A1

    公开(公告)日：2010-06-24

    申请号：US12063544

    申请日：2007-05-10

    申请人： Ofir Shalvi ,  Dotan Sokolov ,  Ariel Maislos ,  Zeev Cohen ,  Eyal Gurgi ,  Gil Semo

    发明人： Ofir Shalvi ,  Dotan Sokolov ,  Ariel Maislos ,  Zeev Cohen ,  Eyal Gurgi ,  Gil Semo

    IPC分类号： G11C27/00 ,  G11C8/00 ,  G11C7/00

    CPC分类号： G11C16/349 ,  G06F2212/7205 ,  G06F2212/7206 ,  G11C11/56 ,  G11C11/5607 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C11/565 ,  G11C11/5657 ,  G11C11/5671 ,  G11C11/5678 ,  G11C27/005 ,  G11C2211/5621 ,  G11C2211/5641

    摘要： A method for data storage in a memory (28) that includes a plurality of analog memory cells (32) includes estimating respective achievable storage capacities of the analog memory cells. The memory cells are assigned respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities. The data is stored in the memory cells in accordance with the respective assigned storage configurations. The achievable storage capacities of the analog memory cells are re-estimated after the memory has been installed in a host system and used for storing the data in the host system. The storage configurations are modified responsively to the re-estimated achievable capacities.

    摘要翻译： 一种用于在包括多个模拟存储器单元（32）的存储器（28）中的数据存储的方法包括估计模拟存储器单元的各个可实现的存储容量。 根据估计的可实现的容量，为存储器单元分配相应的存储配置，其定义要存储在存储器单元中的数据量。 数据根据相应的分配的存储配置存储在存储器单元中。 在存储器已经安装在主机系统中并用于在主机系统中存储数据之后，重新估计模拟存储器单元的可实现的存储容量。 存储配置根据重新估计的可实现容量进行修改。

    Memory device with reduced reading latency
    3.
    发明授权
    Memory device with reduced reading latency 有权
    具有缩短阅读延迟的内存设备

    公开(公告)号：US07593263B2

    公开(公告)日：2009-09-22

    申请号：US11958011

    申请日：2007-12-17

    申请人： Dotan Sokolov ,  Gil Semo ,  Ofir Shalvi

    发明人： Dotan Sokolov ,  Gil Semo ,  Ofir Shalvi

    IPC分类号： G11C16/04

    CPC分类号： G11C16/26

    摘要： A method for data storage includes providing a memory, which includes first memory cells having a first reading latency and second memory cells having a second reading latency that is higher than the first reading latency. An item of data intended for storage in the memory is divided into first and second parts. The first part is stored in the first memory cells and the second part is stored in the second memory cells. In response to a request to retrieve the item of data from the memory, the first part is read from the first memory cells and provided as output. The second part is read from the second memory cells, and provided as output subsequently to outputting the first part.

    摘要翻译： 一种用于数据存储的方法包括提供存储器，其包括具有第一读取延迟的第一存储器单元和具有高于第一读取延迟的第二读取延迟的第二存储器单元。 用于存储在存储器中的数据项被分为第一和第二部分。 第一部分存储在第一存储单元中，第二部分存储在第二存储单元中。 响应于从存储器检索数据项的请求，第一部分从第一存储器单元读取并作为输出提供。 第二部分从第二存储器单元读取，随后作为输出提供输出第一部分。

    High-performance ECC decoder
    4.
    发明授权
    High-performance ECC decoder 有权
    高性能ECC解码器

    公开(公告)号：US08327242B1

    公开(公告)日：2012-12-04

    申请号：US12419304

    申请日：2009-04-07

    申请人： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

    发明人： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

    IPC分类号： H03M13/00

    CPC分类号： G06F11/1076 ,  H03M13/03 ,  H03M13/1525 ,  H03M13/45 ,  H03M13/617

    摘要： Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

    摘要翻译： 用于纠错码（ECC）解码的方法包括从表示已经用ECC编码的数据的一组位产生综合征。 错误定位器多项式（ELP）是基于综合征产生的。 识别至少一些ELP根，并校正由这些根指示的错误。 可以通过应用向量空间中的比特向量操作来产生每个综合征。 通过使用向量空间的不同基础应用向量运算来产生每个综合征。 可以通过使用串行乘法器对ELP系数进行操作，在给定的场元件上评估ELP，其中每个串行乘法器执行乘法周期序列，并在每个周期中产生中间结果。 响应于检测至少一个中期结果，指示给定的元素不是ELP根，在完成序列之前终止乘法循环。

    Memory device with adaptive capacity
    5.
    发明授权
    Memory device with adaptive capacity 有权
    具有适应能力的存储器件

    公开(公告)号：US08694859B2

    公开(公告)日：2014-04-08

    申请号：US13539920

    申请日：2012-07-02

    申请人： Ofir Shalvi ,  Dotan Sokolov ,  Ariel Maislos ,  Zeev Cohen ,  Eyal Gurgi ,  Gil Semo

    发明人： Ofir Shalvi ,  Dotan Sokolov ,  Ariel Maislos ,  Zeev Cohen ,  Eyal Gurgi ,  Gil Semo

    IPC分类号： G06F11/00

    CPC分类号： G11C16/349 ,  G06F2212/7205 ,  G06F2212/7206 ,  G11C11/56 ,  G11C11/5607 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C11/565 ,  G11C11/5657 ,  G11C11/5671 ,  G11C11/5678 ,  G11C27/005 ,  G11C2211/5621 ,  G11C2211/5641

    摘要： A method for data storage in a memory that includes a plurality of analog memory cells includes estimating respective achievable storage capacities of the analog memory cells. The memory cells are assigned respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities. The data is stored in the memory cells in accordance with the respective assigned storage configurations. The achievable storage capacities of the analog memory cells are re-estimated after the memory has been installed in a host system and used for storing the data in the host system. The storage configurations are modified responsively to the re-estimated achievable capacities.

    摘要翻译： 一种用于在包括多个模拟存储器单元的存储器中的数据存储的方法包括估计模拟存储器单元的各自可实现的存储容量。 根据估计的可实现的容量，为存储器单元分配相应的存储配置，其定义要存储在存储器单元中的数据量。 数据根据相应的分配的存储配置存储在存储器单元中。 在存储器已经安装在主机系统中并用于在主机系统中存储数据之后，重新估计模拟存储器单元的可实现的存储容量。 存储配置根据重新估计的可实现容量进行修改。

    High-performance ECC decoder
    6.
    发明授权
    High-performance ECC decoder 有权

    公开(公告)号：US08484544B2

    公开(公告)日：2013-07-09

    申请号：US13590565

    申请日：2012-08-21

    申请人： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

    发明人： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

    IPC分类号： H03M13/00

    CPC分类号： G06F11/1076 ,  H03M13/03 ,  H03M13/1525 ,  H03M13/45 ,  H03M13/617

    摘要： Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

    Memory Device with Adaptive Capacity
    7.
    发明申请
    Memory Device with Adaptive Capacity 有权
    具有自适应容量的存储器件

    公开(公告)号：US20130007566A1

    公开(公告)日：2013-01-03

    申请号：US13539920

    申请日：2012-07-02

    申请人： Ofir Shalvi ,  Dotan Sokolov ,  Ariel Maislos ,  Zeev Cohen ,  Eyal Gurgi ,  Gil Semo

    发明人： Ofir Shalvi ,  Dotan Sokolov ,  Ariel Maislos ,  Zeev Cohen ,  Eyal Gurgi ,  Gil Semo

    IPC分类号： G06F12/02 ,  H03M13/05

    CPC分类号： G11C16/349 ,  G06F2212/7205 ,  G06F2212/7206 ,  G11C11/56 ,  G11C11/5607 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C11/565 ,  G11C11/5657 ,  G11C11/5671 ,  G11C11/5678 ,  G11C27/005 ,  G11C2211/5621 ,  G11C2211/5641

    摘要： A method for data storage in a memory that includes a plurality of analog memory cells includes estimating respective achievable storage capacities of the analog memory cells. The memory cells are assigned respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities. The data is stored in the memory cells in accordance with the respective assigned storage configurations. The achievable storage capacities of the analog memory cells are re-estimated after the memory has been installed in a host system and used for storing the data in the host system. The storage configurations are modified responsively to the re-estimated achievable capacities.

    摘要翻译： 一种用于在包括多个模拟存储器单元的存储器中的数据存储的方法包括估计模拟存储器单元的各自可实现的存储容量。 根据估计的可实现的容量，为存储器单元分配相应的存储配置，其定义要存储在存储器单元中的数据量。 数据根据相应的分配的存储配置存储在存储器单元中。 在存储器已经安装在主机系统中并用于在主机系统中存储数据之后，重新估计模拟存储器单元的可实现的存储容量。 存储配置根据重新估计的可实现容量进行修改。

    HIGH-PERFORMANCE ECC DECODER
    8.
    发明申请
    HIGH-PERFORMANCE ECC DECODER 有权
    高性能ECC解码器

    公开(公告)号：US20120317457A1

    公开(公告)日：2012-12-13

    申请号：US13590565

    申请日：2012-08-21

    申请人： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

    发明人： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

    IPC分类号： H03M13/29 ,  G06F11/10

    CPC分类号： G06F11/1076 ,  H03M13/03 ,  H03M13/1525 ,  H03M13/45 ,  H03M13/617

    摘要： Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

    摘要翻译： 用于纠错码（ECC）解码的方法包括从表示已经用ECC编码的数据的一组位产生综合征。 错误定位器多项式（ELP）是基于综合征产生的。 识别至少一些ELP根，并校正由这些根指示的错误。 可以通过应用向量空间中的比特向量操作来产生每个综合征。 通过使用向量空间的不同基础应用向量运算来产生每个综合征。 可以通过使用串行乘法器对ELP系数进行操作，在给定的场元件上评估ELP，其中每个串行乘法器执行乘法周期序列，并在每个周期中产生中间结果。 响应于检测至少一个中期结果，指示给定的元素不是ELP根，在完成序列之前终止乘法循环。

    Data scrambling schemes for memory devices
    9.
    发明授权
    Data scrambling schemes for memory devices 有权
    存储器件的数据加扰方案

    公开(公告)号：US08261159B1

    公开(公告)日：2012-09-04

    申请号：US12607085

    申请日：2009-10-28

    申请人： Naftali Sommer ,  Micha Anholt ,  Oren Golov ,  Uri Perlmutter ,  Shai Winter ,  Gil Semo

    发明人： Naftali Sommer ,  Micha Anholt ,  Oren Golov ,  Uri Perlmutter ,  Shai Winter ,  Gil Semo

    IPC分类号： G06F11/00

    CPC分类号： G06F11/1048

    摘要： A method for data storage includes defining a set of scrambling sequences, each sequence including bits in respective bit positions having bit values, such that a distribution of the bit values in any give bit position satisfies a predefined statistical criterion. Each data word is scrambled using a respective scrambling sequence selected from the set. The scrambled data words are stored in the memory device.

    摘要翻译： 一种用于数据存储的方法包括定义一组加扰序列，每个序列包括具有比特值的相应比特位置中的比特，使得任何给定比特位置中的比特值的分布满足预定义的统计标准。 使用从集合中选择的相应加扰序列对每个数据字进行加扰。 加扰的数据字被存储在存储器件中。

    Memory Device with adaptive capacity
    10.
    发明授权
    Memory Device with adaptive capacity 有权
    具有适应能力的存储器件

    公开(公告)号：US08239735B2

    公开(公告)日：2012-08-07

    申请号：US12063544

    申请日：2007-05-10

    申请人： Ofir Shalvi ,  Dotan Sokolov ,  Ariel Maislos ,  Zeev Cohen ,  Eyal Gurgi ,  Gil Semo

    发明人： Ofir Shalvi ,  Dotan Sokolov ,  Ariel Maislos ,  Zeev Cohen ,  Eyal Gurgi ,  Gil Semo

    IPC分类号： G06F11/00

    CPC分类号： G11C16/349 ,  G06F2212/7205 ,  G06F2212/7206 ,  G11C11/56 ,  G11C11/5607 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C11/565 ,  G11C11/5657 ,  G11C11/5671 ,  G11C11/5678 ,  G11C27/005 ,  G11C2211/5621 ,  G11C2211/5641

    摘要： A method for data storage in a memory (28) that includes a plurality of analog memory cells (32) includes estimating respective achievable storage capacities of the analog memory cells. The memory cells are assigned respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities. The data is stored in the memory cells in accordance with the respective assigned storage configurations. The achievable storage capacities of the analog memory cells are re-estimated after the memory has been installed in a host system and used for storing the data in the host system. The storage configurations are modified responsively to the re-estimated achievable capacities.

    摘要翻译： 一种用于在包括多个模拟存储器单元（32）的存储器（28）中的数据存储的方法包括估计模拟存储器单元的各个可实现的存储容量。 根据估计的可实现的容量，为存储器单元分配相应的存储配置，其定义要存储在存储器单元中的数据量。 数据根据相应的分配的存储配置存储在存储器单元中。 在存储器已经安装在主机系统中并用于在主机系统中存储数据之后，重新估计模拟存储器单元的可实现的存储容量。 存储配置根据重新估计的可实现容量进行修改。