公开(公告)号：US11977033B2

公开(公告)日：2024-05-07

申请号：US17053107

申请日：2019-05-13

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yuya Sugasawa ,  Hideyuki Arai ,  Hisashi Aikawa

IPC: G01N21/00 ,  G01N21/88 ,  G06N3/08 ,  G06N20/00 ,  G06T7/00 ,  G06V10/143 ,  G06V10/764 ,  G06V10/774 ,  G06V20/00

CPC classification number: G01N21/8851 ,  G01N21/8806 ,  G06N3/08 ,  G06N20/00 ,  G06T7/0006 ,  G06V10/143 ,  G06V10/764 ,  G06V10/7747 ,  G06V20/00 ,  G01N2021/8845 ,  G01N2021/8854 ,  G01N2021/8887

Abstract: A learning device includes a camera configured to acquire image data by imaging a sample of a product, a physical property information acquisition unit configured to acquire physical property information of the sample, and a processing unit configured to generate a learning model. The processing unit is configured to identify a category of the sample based on rule information relating the physical property information to the category, to generate teacher data by relating the identified category to the image data, and to generate a learning model by machine learning using the teacher data. The learning model outputs the category of the sample in response to an input of the image data of the sample.

公开(公告)号：US11889215B2

公开(公告)日：2024-01-30

申请号：US17486495

申请日：2021-09-27

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Tatsuya Kabe ,  Hideyuki Arai ,  Hisashi Aikawa ,  Yuki Sugiura ,  Akito Inoue ,  Mitsuyoshi Mori ,  Kentaro Nakanishi ,  Yusuke Sakata

IPC: H04N25/75 ,  H01L27/146 ,  H04N25/766

CPC classification number: H04N25/75 ,  H01L27/14612 ,  H01L27/14636 ,  H01L27/14643 ,  H04N25/766

Abstract: A light detector is configured such that a light receiving portion having APDs and a peripheral circuit portion are provided on a first principal surface of a p-type semiconductor substrate, and further includes a back electrode provided on a second principal surface of the semiconductor substrate and a p-type first separation portion provided between the light receiving portion and the peripheral circuit portion. The APD has, on a first principal surface side, an n-type region and a p-epitaxial layer contacting the n-type region in a Z-direction. The peripheral circuit portion has an n-type MISFET provided at a p-well and an n-well provided to surround side and bottom portions of the p-well.