公开(公告)号：US20230274864A1

公开(公告)日：2023-08-31

申请号：US18173598

申请日：2023-02-23

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yuto AKIYAMA ,  Ken YANAI ,  Masashi TAKAMURA ,  Yuji YAMAGISHI ,  Ryosuke USUI

IPC: H01C7/102 ,  H01C7/18

CPC classification number: H01C7/102 ,  H01C7/18

Abstract: A multilayer varistor according to the present disclosure includes: a sintered compact having, on a surface thereof, at least one planar portion and at least one corner portion; an internal electrode provided inside the sintered compact; a high-resistivity layer arranged to cover the at least one planar portion and the at least one corner portion of the sintered compact at least partially; and an external electrode arranged to cover the high-resistivity layer partially and electrically connected to the internal electrode. The high-resistivity layer includes: a first high-resistivity layer covering the at least one planar portion; and a second high-resistivity layer covering the at least one corner portion. The first high-resistivity layer has a larger average thickness than the second high-resistivity layer.

公开(公告)号：US20230197321A1

公开(公告)日：2023-06-22

申请号：US18064650

申请日：2022-12-12

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yuto AKIYAMA ,  Ryosuke USUI ,  Ken YANAI

IPC: H01C7/112 ,  H01C7/18

CPC classification number: H01C7/112 ,  H01C7/18

Abstract: A multilayer varistor of the present disclosure includes a sintered body, a first internal electrode, a second internal electrode, a first external electrode, a second external electrode, and a high-resistance layer. The first internal electrode and the second internal electrode are disposed in the sintered body. The first external electrode is disposed on a surface of the sintered body and is electrically connected to the first internal electrode. The second external electrode is disposed on the surface of the sintered body and is electrically connected to the second internal electrode. The high-resistance layer covers at least part of the surface of the sintered body, and the high-resistance layer has a surface having a plurality of cracks.

公开(公告)号：US20230274863A1

公开(公告)日：2023-08-31

申请号：US18173584

申请日：2023-02-23

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yuto AKIYAMA ,  Ken YANAI ,  Ryosuke USUI ,  Yuji YAMAGISHI ,  Masashi TAKAMURA

IPC: H01C7/102 ,  H01C7/18

CPC classification number: H01C7/102 ,  H01C7/18

Abstract: A multilayer varistor according to the present disclosure includes; a sintered compact; an internal electrode provided inside the sintered compact; a high-resistivity layer arranged to cover the sintered compact at least partially; and an external electrode arranged to cover the high-resistivity layer partially and electrically connected to the internal electrode. The high-resistivity layer includes a thinner region having a smaller thickness than a surrounding region that surrounds the thinner region.

公开(公告)号：US20230207159A1

公开(公告)日：2023-06-29

申请号：US18068282

申请日：2022-12-19

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yuto AKIYAMA ,  Ken YANAI ,  Ryosuke USUI ,  Yuji YAMAGISHI

IPC: H01C1/14 ,  H01C7/10

CPC classification number: H01C1/14 ,  H01C7/10

Abstract: A multilayer varistor includes: a sintered compact; an internal electrode provided inside the sintered compact; a high-resistivity layer arranged to cover the sintered compact at least partially and containing element Si; and an external electrode arranged to cover the high-resistivity layer partially, electrically connected to the internal electrode, and containing silver as a main component thereof. A ratio of a total mass of the alkali metals and the alkaline earth metals to a mass of the element Si in a surface region of the high-resistivity layer is equal to or less than 0.6.

公开(公告)号：US20220310291A1

公开(公告)日：2022-09-29

申请号：US17838961

申请日：2022-06-13

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Ken YANAI ,  Tomokazu YAMAGUCHI ,  Yuji YAMAGISHI ,  Naoki MUTOU ,  Sayaka MATSUMOTO ,  Ryosuke USUI

IPC: H01C17/30 ,  H01C7/10 ,  H01C7/18 ,  H01C17/28

Abstract: A sintered body that includes semiconductor ceramic layers and an internal electrode which are alternately stacked on one another is prepared. A first external electrode is formed on a side surface of the sintered body such that the first external electrode is connected to the internal electrode. An insulating layer is formed on a surface of the sintered body by applying a glass coating over an entire of the sintered body having the formed first external electrode. The insulating layer is exposed from the first external electrode. A second external electrode is formed on the first external electrode. This method provides the produced multilayer electronic component with a stable electric connection between the internal electrodes and the external electrodes.