Abstract:
A liquid crystal display device that performs phase inversion drive in which a phase of a polarity of a data voltage is inverted in predetermined timing while performing frame inversion drive in which a positive-polarity data voltage and a negative-polarity data voltage are alternately output to a data line in each one or plurality of frames. In a first frame immediately after the phase is inverted, the source driver outputs a second data voltage to the data line in initial first periods of a horizontal scanning period, the second data voltage being closer to the common voltage than a first data voltage corresponding to input image data, and outputs the first data voltage to the data line in a second period after the first period in the horizontal scanning period.
Abstract:
A display device includes data lines extending in a first direction, gate lines extending in a second direction, a source driver that supplies a data signal to the data lines, a gate driver that supplies a gate signal to the gate lines, and a timing controller that determines scan order of the gate lines and outputs image data to the source driver based on the scan order. The timing controller determines the scan order of the gate lines based on an input image corresponding to input image data input from an outside, and switches first scan order and second scan order in each frame, the first scan order and the second scan order being different from each other in the scan order.
Abstract:
A display apparatus includes an image display region having pixels sectioned by scanning signal lines and video signal lines, scanning connecting lines, thin film transistors, selection signal lines connected to gate electrodes of the thin film transistors, plural ones of the thin film transistors connected to different ones of the scanning connecting lines being connected to one of the selection signal lines; and a scanning signal drive circuit. The scanning signal drive circuit performs a normal scanning mode in which pulse signals are supplied in turn to plural ones of the scanning connecting lines connected to the one of the selection signal lines, and in the normal scanning mode, a fall timing of the gate-on voltage differs from a fall timing of a last one of the pulse signals supplied to the plural ones of the scanning connecting lines during the selection period.
Abstract:
A display device includes a display portion having gate and source signal lines, and a plurality of pixels, a gate driver that outputs gate signals, a source driver that outputs source signals, and a controller that causes the display portion to display an image at a frame frequency. The controller sets the frame frequency to a first frame frequency F1 when the image is a moving picture, and the controller sets the frame frequency to a second frame frequency F2 lower than F1 when the image is a still picture. The gate driver outputs the gate signals to the gate signal lines in an aligned order of gate signal lines in a second direction when the frame frequency is F1, and the gate driver outputs the gate signals to the gate signal lines in different order from the array order when the frame frequency is F2.
Abstract:
A display device comprises: data lines extending in a first direction; gate lines extending in a second direction, and being divided into groups each of which has the gate lines adjacent in the first direction; selection signal supplying wirings each of which is provided in each group, and connected to each control electrode of the selector transistors corresponding to the group; gate voltage supplying wirings connected to the other conductive electrode of each of the selector transistors corresponding to the group; and wherein a gate driver supplies a second gate voltage having a voltage level lower than that of a first gate voltage to at least one of the gate voltage supplying wirings in each of the groups before supplying the first gate voltage in order to turn on a pixel transistor disposed in an intersection portion of the data line and the gate line.
Abstract:
A display device includes an image display area that includes pixels sectioned by scanning signal lines and video signal lines, first scanning connection lines connected to scanning signal lines, first thin film transistors, first selection signal lines, second thin film transistors, second selection signal lines, and a scanning signal drive circuit connected to the first scanning connection lines, the first selection signal lines, and the second selection signal lines, wherein the scanning signal drive circuit sequentially supplies a pulse signal to the first scanning connection lines in a selection period in which a gate-on voltage is applied to the one of the first selection signal lines, and the scanning signal drive circuit applies a gate-off voltage to the one of the second selection signal lines corresponding to the one of the first selection signal lines to which the gate-on voltage is applied.
Abstract:
Provided is a liquid crystal display device capable of preventing a type of screen burn-in phenomenon caused by fluctuations in DC component of a liquid crystal drive voltage, which occurs when the refresh rate is switched. A control device can perform quadruple speed drive and double speed drive of a liquid crystal panel in an inversion drive method. A common electrode is supplied with a common voltage set in advance based on a midpoint potential in inversion drive of voltages set for a pixel electrode in the quadruple speed drive. In both of the quadruple speed drive and the double speed drive switched from the quadruple speed drive, a width of a scanning pulse (Pk) of a gate voltage (VGk) is set to a width of 1H in the quadruple speed drive.
Abstract:
A liquid crystal display device which includes one image signal line which is connected to a plurality of pixels, a scanning line drive part which outputs an ON voltage to the respective pixels in a predetermined order, and a data line drive part which outputs image signal voltages. The data line drive part outputs a gray level signal voltage corresponding to a gray level value of the pixel as an image signal voltage in a first period, and outputs a correction gray level signal voltage different from the gray level signal voltage as an image signal voltage in a second period which precedes the first period. The liquid crystal display device further includes a control part which generates the correction gray level signal voltage based on the gray level value of the pixel and one or plurality of gray level values of pixels which precede the pixel in order.
Abstract:
A display apparatus includes an image display region having pixels sectioned by scanning signal lines and video signal lines, scanning connecting lines, thin film transistors, selection signal lines connected to gate electrodes of the thin film transistors, plural ones of the thin film transistors connected to different ones of the scanning connecting lines being connected to one of the selection signal lines; and a scanning signal drive circuit. The scanning signal drive circuit performs a normal scanning mode in which pulse signals are supplied in turn to plural ones of the scanning connecting lines connected to the one of the selection signal lines, and in the normal scanning mode, a fall timing of the gate-on voltage differs from a fall timing of a last one of the pulse signals supplied to the plural ones of the scanning connecting lines during the selection period.
Abstract:
A liquid crystal display device that performs phase inversion drive in which a phase of a polarity of a data voltage is inverted in predetermined timing while performing frame inversion drive in which a positive-polarity data voltage and a negative-polarity data voltage are alternately output to a data line in each one or plurality of frames. In a first frame immediately after the phase is inverted, the source driver outputs a second data voltage to the data line in initial first periods of a horizontal scanning period, the second data voltage being closer to the common voltage than a first data voltage corresponding to input image data, and outputs the first data voltage to the data line in a second period after the first period in the horizontal scanning period.