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公开(公告)号：US06763996B2
公开(公告)日：2004-07-20
申请号：US09955345
申请日：2001-09-18
IPC分类号： G06F1700
CPC分类号： G06K19/0723 , G06K7/0008
摘要： In accordance with the present invention, a radio frequency identification (RFID) device comprises a plurality of data fields. The RFID device transmits a data symbol from a data field, receives an acknowledgement symbol, and compares the transmitted data symbol to the received acknowledgement symbol. The RFID device repeats these steps until data transmission is complete as long as each transmitted data symbol is equivalent to a corresponding received acknowledgement symbol; otherwise, the RFID device maintains the data field from which the last data symbol was transmitted, and temporarily suspends data transmission. When the RFID receives a request for RFID devices temporarily suspended in a given data field to resume data transmission, if the given data field in the request is equivalent to the data field that was maintained, the RFID device repeats the steps above starting with the first symbol in the data field that was maintained.
摘要翻译： 根据本发明，射频识别（RFID）设备包括多个数据字段。 RFID设备从数据字段发送数据符号，接收确认符号，并将发送的数据符号与接收到的确认符号进行比较。 RFID设备重复这些步骤直到数据传输完成，只要每个发送的数据符号等同于相应的接收的确认符号; 否则，RFID设备维护发送最后一个数据符号的数据字段，并暂时暂停数据传输。 当RFID接收到暂时停留在给定数据字段中的RFID设备的请求以恢复数据传输时，如果请求中的给定数据字段等同于维护的数据字段，则RFID设备重复上述步骤，从第一 在维护的数据字段中的符号。
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公开(公告)号：US07706765B2
公开(公告)日：2010-04-27
申请号：US09981476
申请日：2001-10-17
申请人： Timothy James Collins , Richard Stanley Rachwalski , Patrick L. Rakers , David P. Gurney , Stephen L. Kuffner
发明人： Timothy James Collins , Richard Stanley Rachwalski , Patrick L. Rakers , David P. Gurney , Stephen L. Kuffner
IPC分类号： H04L12/413 , H04L12/407
CPC分类号： H04L12/413
摘要： A source device (110) receives a carrier signal and continuously monitors the carrier signal for a first predetermined condition and a second predetermined condition. The source device (110) transmits data if the first predetermined condition is satisfied. The source device (110) ceases transmission of data if the first predetermined condition subsequently is not satisfied or if a second predetermined condition is satisfied.
摘要翻译： 源设备（110）接收载波信号并连续地监视载波信号的第一预定条件和第二预定条件。 如果满足第一预定条件，则源装置（110）发送数据。 如果第一预定条件不满足或满足第二预定条件，则源设备（110）停止数据传输。
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3.发明授权Method and apparatus for selectively activating radio frequency identification tags that are in close proximity 有权用于选择性地激活非常接近的射频识别标签的方法和装置公开(公告)号：US06392544B1
公开(公告)日：2002-05-21
申请号：US09669289
申请日：2000-09-25
IPC分类号： G08B1314
CPC分类号： G06K7/10346 , G06K7/0008 , G06K7/10019 , G06K7/10316
摘要： A radio frequency identification exciter (200) includes a plurality of antenna elements (122a-i) that are spaced to define active areas (130a-e). A matrix switch (202) flexibly connects the plurality of antenna elements to an exciter circuit (203). Independent switches (204a-i) are selectively switched such that an electric field is generated between at least two antenna elements whereby radio frequency identification tags (132) in the vicinity of the two antenna elements are capacitively powered to exchange data with the exciter. Antenna elements other than the at least two antenna elements may be selectively coupled to a signal from the exciter circuit that inhibits activation of radio frequency identification tags in the vicinity of those antenna elements. The matrix switch preferably comprises polymer-based circuits.
摘要翻译： 射频识别激励器（200）包括间隔开以限定有源区域（130a-e）的多个天线元件（122a-i）。 矩阵开关（202）将多个天线元件灵活地连接到激励器电路（203）。 选择性地切换独立开关（204a-i），使得在至少两个天线元件之间产生电场，由此在两个天线元件附近的射频识别标签（132）被电容地供电以与激励器交换数据。 除了至少两个天线元件之外的天线元件可以选择性地耦合到来自激励器电路的信号，该信号禁止在那些天线元件附近激活射频识别标签。 矩阵开关优选地包括基于聚合物的电路。
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公开(公告)号：US07653678B2
公开(公告)日：2010-01-26
申请号：US11457380
申请日：2006-07-13
IPC分类号： G06G7/16
CPC分类号： G06G7/26
摘要： A direct digital synthesis circuit (108) includes a plurality of current sources (210, 211, 212), an output circuit (200), and a logical multiplier circuit (202). The output circuit (200) provides a synthesized waveform (164) output and includes a first (206) and second branch (208). The logical multiplier circuit (202) is operatively coupled to the plurality of current sources (210, 211, 212) and to the output circuit (200). The logical multiplier circuit (202) is operative to receive a plurality of signals. The logical multiplier circuit is also operative to selectively increase a first current flow through the first branch (206) by a determined magnitude and decrease a second current flow through the second branch (208) by the determined magnitude based on the plurality of signals. The synthesized waveform (164) is based on the first and second currents.
摘要翻译： 直接数字合成电路（108）包括多个电流源（210,211,212），输出电路（200）和逻辑乘法器电路（202）。 输出电路（200）提供输出的合成波形（164），并包括第一分支（206）和第二分支（208）。 逻辑乘法器电路（202）可操作地耦合到多个电流源（210,211,212）和输出电路（200）。 逻辑乘法器电路（202）可操作以接收多个信号。 逻辑乘法器电路还可操作以选择性地将通过第一分支（206）的第一电流流过确定的幅度，并且基于多个信号减少通过第二分支（208）的确定的幅度的第二电流。 合成波形（164）基于第一和第二电流。
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公开(公告)号：US20080016141A1
公开(公告)日：2008-01-17
申请号：US11457380
申请日：2006-07-13
IPC分类号： G06G7/16
CPC分类号： G06G7/26
摘要： A direct digital synthesis circuit (108) includes a plurality of current sources (210, 211, 212), an output circuit (200), and a logical multiplier circuit (202). The output circuit (200) provides a synthesized waveform (164) output and includes a first (206) and second branch (208). The logical multiplier circuit (202) is operatively coupled to the plurality of current sources (210, 211, 212) and to the output circuit (200). The logical multiplier circuit (202) is operative to receive a plurality of signals. The logical multiplier circuit is also operative to selectively increase a first current flow through the first branch (206) by a determined magnitude and decrease a second current flow through the second branch (208) by the determined magnitude based on the plurality of signals. The synthesized waveform (164) is based on the first and second currents.
摘要翻译： 直接数字合成电路（108）包括多个电流源（210,211,212），输出电路（200）和逻辑乘法器电路（202）。 输出电路（200）提供输出的合成波形（164），并包括第一分支（206）和第二分支（208）。 逻辑乘法器电路（202）可操作地耦合到多个电流源（210,211,212）和输出电路（200）。 逻辑乘法器电路（202）可操作以接收多个信号。 逻辑乘法器电路还可操作以选择性地将通过第一分支（206）的第一电流流动增加确定的幅度，并且基于多个信号减少通过第二分支（208）的确定的幅度的第二电流。 合成波形（164）基于第一和第二电流。
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6.发明授权Method and apparatus for data backup and restoration in a portable data device 有权在便携式数据设备中进行数据备份和恢复的方法和装置公开(公告)号：US06317755B1
公开(公告)日：2001-11-13
申请号：US09360571
申请日：1999-07-26
IPC分类号： G06F1730
CPC分类号： G07F7/1008 , G06F11/1441 , G06Q20/341 , G06Q20/3576 , Y10S707/99955
摘要： A portable data device (300) having a memory (302) is provided. The memory (302) is segmented into a plurality of sectors (304-312). A backup memory buffer (312) and a plurality of applications (304-310) are programmed into the plurality of sectors, wherein the backup memory buffer (312) is jointly used by the plurality of applications (304-310). A valid state of data is stored in the backup memory buffer (312) prior to performing a transaction for a first application (304). The valid state of data is restored in the first application (304) upon power up of the portable data device (300) in an event the transaction is terminated prior to completion, wherein the step of restoring is independent of a next application in which a next transaction is performed.
摘要翻译： 提供具有存储器（302）的便携式数据设备（300）。 存储器（302）被分割成多个扇区（304-312）。 备份存储器缓冲器（312）和多个应用程序（304-310）被编程到多个扇区中，其中备用存储器缓冲器（312）由多个应用程序共同使用（304-310）。 在对第一应用执行交易之前，将有效的数据状态存储在备份存储器缓冲器（312）中（304）。 在事务在完成之前被终止的情况下，在便携式数据设备（300）上电时，在第一应用（304）中恢复数据的有效状态，其中恢复步骤独立于下一个应用 执行下一个事务。
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公开(公告)号：US06384727B1
公开(公告)日：2002-05-07
申请号：US09630987
申请日：2000-08-02
IPC分类号： G08B1314
CPC分类号： H01Q1/2225 , G06F19/00 , G06K19/077 , G06K19/07749 , H01Q9/285 , H01Q23/00 , Y10T29/49155
摘要： A capacitively powered radio frequency identification device (10) comprises a substrate (12), a conductive pattern (14, 16) and a circuit (18). The substrate (12) has a first surface and a second surface. The conductive pattern is formed on the first surface of the substrate (12). The conductive pattern has a first electrode (14) and a second electrode (16). The first and second electrodes (14, 16) are isolated from each other by a non-conductive region disposed therebetween. The circuit (18) comprises polymers. The circuit (18) is electrically coupled to the first electrode (14) and the second electrode (16).
摘要翻译： 电容供电的射频识别装置（10）包括基板（12），导电图案（14,16）和电路（18）。 衬底（12）具有第一表面和第二表面。 导电图案形成在基板（12）的第一表面上。 导电图案具有第一电极（14）和第二电极（16）。 第一和第二电极（14,16）通过设置在它们之间的非导电区域彼此隔离。 电路（18）包括聚合物。 电路（18）电耦合到第一电极（14）和第二电极（16）。
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8.发明授权公开(公告)号：US07057492B2
公开(公告)日：2006-06-06
申请号：US10092150
申请日：2002-03-06
申请人： Miles R. Jackson , Joseph F. Wodka , Timothy James Collins , Patrick L. Rakers , Mark Paul Lill
发明人： Miles R. Jackson , Joseph F. Wodka , Timothy James Collins , Patrick L. Rakers , Mark Paul Lill
IPC分类号： G05B19/12
CPC分类号： G06K7/10326 , G06K7/0008 , G06K7/10069 , G06K19/0701 , G06K19/0723 , G06K19/07749 , G06K19/07788 , G06Q30/02 , G06Q30/0209 , G06Q30/0211 , G06Q30/0224 , G06Q30/0225 , G06Q30/0226 , G06Q30/0235 , G06Q30/0236 , G06Q30/0237 , G06Q30/0238 , G06Q30/0239 , G06Q30/0242 , G06Q30/0267 , G06Q30/0269 , G07C1/10 , G08B13/2417
摘要： A radio frequency identification (“RFID”) device (102) having stored thereon an expiration and a set of data bits which, when presented to a processing device (602) via a RFID reader (206), causes the processing device (602) to enable a feature that would otherwise be disabled in an electronic device (600), and disable the feature when the expiration reaches a predetermined value.
摘要翻译： 一种具有存储在其上的过期和一组数据位的射频识别（“RFID”）设备（102），当经由RFID读取器（206）呈现给处理设备（602）时，该处理设备（602） 以启用否则将在电子设备（600）中被禁用的特征，并且当所述到期达到预定值时禁用所述特征。
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公开(公告)号：US20120252396A1
公开(公告)日：2012-10-04
申请号：US13078502
申请日：2011-04-01
申请人： Haolu Xie , Manish N. Shah , Patrick L. Rakers
发明人： Haolu Xie , Manish N. Shah , Patrick L. Rakers
CPC分类号： H04B1/28 , H03D2200/0074 , H03D2200/0088 , H03K2217/0054
摘要： A technique for improving the linearity of a mixer is disclosed. A converter may include a mixer comprising a first metal-oxide semiconductor field-effect transistor (MOSFET) having a gate, a first conducting terminal coupled to an input of the converter, and a second conducting terminal coupled to an output of the converter, and a mixer driver having a first output coupled to the gate of the first MOSFET, the mixer driver configured to receive a local-oscillator signal having a first phase and a second phase, drive the first MOSFET off during the first phase of the local-oscillator signal, drive the first MOSFET on for a first period of time in response to a transition from the first phase of the local-oscillator signal to the second phase of the local-oscillator signal, and force the gate of the first MOSFET into a high impedance state for a second period of time during the second phase of the local-oscillator signal and after the expiration of the first period of time.
摘要翻译： 公开了一种改善混频器线性度的技术。 A转换器可以包括混合器，其包括具有栅极的第一金属氧化物半导体场效应晶体管（MOSFET），耦合到转换器的输入端的第一导电端子和耦合到转换器的输出端的第二导通端子，以及 混频器驱动器，其具有耦合到第一MOSFET的栅极的第一输出，混频器驱动器被配置为接收具有第一相位和第二相位的本地振荡器信号，在本机振荡器的第一阶段期间驱动第一MOSFET关断 信号，响应于从本地振荡器信号的第一相到本地振荡器信号的第二相的转变，驱动第一MOSFET导通第一时间段，并迫使第一MOSFET的栅极变为高电平 在本地振荡器信号的第二阶段期间和在第一时间段到期之后的第二时间段的阻抗状态。
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公开(公告)号：US08698664B2
公开(公告)日：2014-04-15
申请号：US13363884
申请日：2012-02-01
申请人： Omid Oliaei , Patrick L. Rakers
发明人： Omid Oliaei , Patrick L. Rakers
IPC分类号： H03M1/12
摘要： In accordance with embodiments of the present disclosure, a continuous-time incremental analog-to-digital converter (ADC) may include a plurality of resettable integrators and a feed-in gain element. Each integrator may be configured to convert a sum of signals received at its input to a signal indicative of an integral over time of the sum of signals. The plurality of integrators may include a first-stage integrator configured to receive at its input the baseband signal and a final-stage integrator configured to produce at its output a final-stage analog signal. The plurality of integrators may be arranged in a cascade configuration such that an output of each of the plurality of integrators other than the final-stage integrator is coupled to the input of a subsequent integrator. The feed-in gain element may be coupled between the input of the first-stage integrator and the input of another integrator of the plurality of integrators.
摘要翻译： 根据本公开的实施例，连续时间增量模数转换器（ADC）可以包括多个可复位积分器和馈入增益元件。 每个积分器可以被配置为将在其输入处接收的信号的和转换成指示信号总和的积分的信号。 多个积分器可以包括被配置为在其输入处接收基带信号的第一级积分器和被配置为在其输出端产生最终级模拟信号的最终级积分器。 多个积分器可以被布置成级联配置，使得除了最终级积分器之外的多个积分器中的每一个的输出耦合到后续积分器的输入。 馈入增益元件可以耦合在第一级积分器的输入端和多个积分器的另一个积分器的输入端之间。
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