摘要:
The present invention provides a multimode receiver design for mitigation of frequency offset by selective demodulation of an input modulated signal. The receiver (103) comprises a plurality of demodulators (207). Each of the plurality of demodulators (207) has the same functionality but different receiver sensitivity versus frequency-offset mitigation characteristics. Each of these demodulators incorporates a different demodulation technique. A suitable demodulator is selected to demodulate the received signal. The choice of a suitable demodulator is based on the value of the frequency offset (305, 307).
摘要:
A method (500) and system for compensation of frequency offset between a first transceiver (102) and a second transceiver (104) in wireless communication are disclosed. The compensation of the frequency offset between two or more transceivers (102, 104) is achieved using frequency synchronization bursts. These bursts contain information about the frequency offset. The frequency synchronization bursts are transmitted by the first transceiver at a range of frequencies above and below its carrier frequency (502). A second transceiver that receives at least one of these bursts (504) determines the frequency offset (504), and adjusts its frequency to match the frequency of the first transceiver (508). Thereafter, the second transceiver may enter a low power sleep mode (510) in order to reduce its power consumption. The second transceiver returns to active mode (512) just before the start of the transmission of the data packets (514).
摘要:
A system and method for orthogonal modulation of signals in communication systems. In the transmitter, differentially coded symbols are used to select time-shifted code sequences. The timing, or code position, of a code sequence is determined at the receiver by comparison to the previous code from the same channel, thus eliminating the need for dual-channel transmission and eliminating error due to differences in path propagation time. A fixed preamble code is also used to synchronize the receiver.
摘要:
A direct sequence spread spectrum (DSSS) receiver (100) consistent with certain embodiments has a frequency generator (112) that generates a local oscillator signal without use of a piezoelectric crystal. A frequency converter (108) receives the local oscillator signal and mixes the local oscillator signal with a received DSSS signal to produce a down-converted signal. The received DSSS signal is encoded using a first set of DSSS code. A differential chip detector (116) receives the down-converted signal and converts the down-converted signal to a differentially detected signal. A correlator (120) receives the differentially detected signal and correlates the detected signal with a set of DSSS codes that are time-shifted from the first set of DSSS codes. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.
摘要:
A method, system, and device provide asymmetric round-trip-time (RTT) ranging with multipath correction. A RTT ranging determination using the resulting composite received signal contains multipath error, and compensation or correction of this error in a manner compatible with low-power, low-complexity devices, such as tag devices, is provided.
摘要:
A method, system, and device provide asymmetric round-trip-time (RTT) ranging with multipath correction. A RTT ranging determination using the resulting composite received signal contains multipath error, and compensation or correction of this error in a manner compatible with low-power, low-complexity devices, such as tag devices, is provided.
摘要:
A method and location determination module is provided for determining a location of one of a plurality of units using neighbor lists. Each unit is communicatively coupled to at least some of the other plurality of units, where at least some of the plurality of units are reference units, whose locations are known. The units communicate with other nearby units within communication range, to establish neighbor lists. A unit to be located then identifies an aggregate value corresponding to the number of occurrences of the reference units in the neighbor list of the unit to be located and the neighbor lists of each of a group of associated units. The location of the unit to be located is then determined, based upon the known locations of the reference units and the number of identified occurrences of the reference units in the corresponding neighbor lists.
摘要:
A signaling system is provided in which a spread spectrum code is cyclically shifted by a cyclical shift dictated by a bit pattern of one or more bits. The cyclically shifted spread spectrum code is used to modulate a carrier frequency, and transmitted from a transmitter to a receiver. At the receiver the signal including the cyclically shifted spectrum code is demodulated to recover the cyclically shifted code. The cyclical shift is then determined and the bit pattern which is associated with the cyclical shift is output. The method can be used in direct sequence spread spectrum communication.
摘要:
A digital-to-phase or digital-to-time-shift converter (100) includes a delay line (106), a multiplexor (108) and synchronization circuit (110). In the converter (100) the clock edges of a reference signal are shifted in response to the value of a multi-bit digital word, IN (104). The synchronization circuit (110) gates the output of the multiplexor (108) such that a pulse appears at the synchronization circuit's (110) output port (114) only when the circuit is gated by a signal at input TRIG (112). The synchronization circuit (110) creates a time aperture for the multiplexor output.
摘要:
A digital frequency synthesizer includes one or more reference clocks (104, 1316, 1502A, 1504A, 1506A) optionally coupled through one or more pulse width reducers (106) to one or more main delay lines (108, 702, 1502B, 1504B, 1506B) that include a plurality of output taps (108B-108I, 702B-702E). During at least certain periods of the reference clock (104) a plurality of the output taps are coupled to a common output (130, 1312, 1508), thereby producing an output signal that has a frequency that exceeds a frequency of the one or more reference clocks. The coupling is preferably accomplished by transmission gates (114, 128, 720-724, 1420-1434) that are switched by gating pulses that are received from decoders (148, 150, 1418) via gating signal delay lines (134-146, 704-718, 1404-1416).