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    MOBILE DEVICE INTERFACE FOR INPUT DEVICES
    1.
    发明申请
    MOBILE DEVICE INTERFACE FOR INPUT DEVICES 有权
    用于输入设备的移动设备接口

    公开(公告)号：US20060223581A1

    公开(公告)日：2006-10-05

    申请号：US11277916

    申请日：2006-03-29

    申请人： Paul Jacobs ,  George Wiley ,  Franklin Antonio

    发明人： Paul Jacobs ,  George Wiley ,  Franklin Antonio

    IPC分类号： H04B1/38 ,  H04M1/00

    CPC分类号： H04M1/72527 ,  H04B1/38 ,  H04M1/6058 ,  H04M2250/18 ,  H04W92/08

    摘要： A mobile electronic device includes an earphone/microphone port, an I/O circuit to receive a modulated data signal from data input devices via the earphone/microphone port, and a processor unit programmed to extract data from the modulated data signal. The processor unit (or the I/O circuit) detects connection of a device to an earphone/microphone connector of the mobile electronic device and determines whether the connected device is a data input device. If the connected device is a data input device, the processor unit is programmed to extract data from modulated data signals generated by data input device.

    摘要翻译： 移动电子设备包括耳机/麦克风端口，经由耳机/麦克风端口从数据输入设备接收调制数据信号的I / O电路，以及被编程为从调制数据信号提取数据的处理器单元。 处理器单元（或I / O电路）检测设备与移动电子设备的耳机/麦克风连接器的连接，并确定连接的设备是否是数据输入设备。 如果连接的设备是数据输入设备，则处理器单元被编程为从由数据输入设备生成的调制数据信号中提取数据。

    Collapsible goal post for American football
    2.
    发明授权
    Collapsible goal post for American football 有权
    可折叠的美式足球目标职位

    公开(公告)号：US08496547B2

    公开(公告)日：2013-07-30

    申请号：US12958212

    申请日：2010-12-01

    申请人： George Wiley

    发明人： George Wiley

    IPC分类号： A63B63/00

    CPC分类号： A63B63/008 ,  A63B2071/009 ,  A63B2210/50

    摘要： A collapsible goal post includes a lower support extending from a playing field; a upper support having a first end and a second end, and a pivot assembly attaching the first end of the upper support to the lower support; an upper assembly comprising two uprights and a crossbar having two ends. The crossbar is attached to the second end of the support at about the midpoint of the crossbar. One of the two uprights is attached to each end of the crossbar. The upper support is configured to pivot about the pivot point assembly to move the upright assembly from a raised position to a lowered position. The two uprights are substantially perpendicular to the playing field in the raised position, and are substantially parallel to and contacting the playing field in the lowered position while the upper assembly and upper support remain attached to the lower support. In another embodiment, the goal post includes a hydraulic cylinder system coupled to the upper support and the lower support to hinder a rate of pivoting of the goal post about the pivot assembly.

    摘要翻译： 可折叠的目标岗位包括从游戏场延伸的较低支撑; 具有第一端和第二端的上支撑件和枢轴组件，所述枢轴组件将所述上支撑件的第一端附接到所述下支撑件; 包括两个立柱的上部组件和具有两个端部的横杆。 横杆在横杆的中点附近附接到支撑件的第二端。 两个立柱之一附在横梁的每一端。 上支撑件构造成围绕枢轴点组件枢转以将直立组件从升高位置移动到降低位置。 两个立柱基本上垂直于升高位置的运动场，并且在上部组件和上部支撑件保持附接到下部支撑件的同时基本上平行于并接触下降位置的运动场。 在另一个实施例中，目标柱包括联接到上支撑件和下支撑件的液压缸系统，以阻止球杆柱绕枢转组件枢转的速率。

    High data rate interface apparatus and method
    3.
    发明申请
    High data rate interface apparatus and method 有权

    公开(公告)号：US20060034326A1

    公开(公告)日：2006-02-16

    申请号：US11107536

    申请日：2005-04-14

    申请人： Jon Anderson ,  Brian Steele ,  George Wiley ,  Shashank Shekhar

    发明人： Jon Anderson ,  Brian Steele ,  George Wiley ,  Shashank Shekhar

    IPC分类号： H04J3/16

    CPC分类号： H04L69/22 ,  H04L69/18 ,  H04M1/72527 ,  Y02D70/144 ,  Y02D70/26

    摘要： A data interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range “serial” type data link, which lends itself to implementation with miniature connectors and thin flexible cables which are especially useful in connecting display elements such as wearable micro-displays to portable computers and wireless communication devices.

    Signal interface for higher data rates
    4.
    发明申请
    Signal interface for higher data rates 有权
    用于更高数据速率的信号接口

    公开(公告)号：US20050117601A1

    公开(公告)日：2005-06-02

    申请号：US10917930

    申请日：2004-08-12

    申请人： Jon Anderson ,  Brian Steele ,  George Wiley ,  Shashank Shekhar

    发明人： Jon Anderson ,  Brian Steele ,  George Wiley ,  Shashank Shekhar

    IPC分类号： G06F13/40 ,  H04L12/56 ,  H04L29/00 ,  H04L29/06 ,  H04M1/725

    CPC分类号： G06F13/4072 ,  H04L29/06027 ,  H04L65/607 ,  H04L69/22 ,  H04M1/72527 ,  Y02D70/00 ,  Y02D70/122 ,  Y02D70/1262 ,  Y02D70/144 ,  Y02D70/26

    摘要： A data Interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range “serial” type data link, which lends itself to implementation with miniature connectors and thin flexible cables which are especially useful in connecting display elements such as wearable micro-displays to portable computers and wireless communication devices.

    摘要翻译： 一种数据接口，用于通过连接在一起的分组结构通过通信路径在主机和客户端之间传送数字数据，以形成用于传送预先选择的一组数字控制和呈现数据的通信协议。 信号协议被配置为生成，发送和接收形成通信协议的分组的链路控制器使用，并且将数字数据形成为一个或多个类型的数据分组，其中至少一个驻留在主机设备中并耦合到 客户端通过通信路径。 该接口通过短距离“串行”类型数据链路提供了经济高效，低功耗，双向，高速的数据传输机制，可实现微型连接器和薄型柔性电缆，特别适用于 将可穿戴式微型显示器等显示元件连接到便携式计算机和无线通信装置。

    DOUBLE DATA RATE SERIAL ENCODER
    7.
    发明申请
    DOUBLE DATA RATE SERIAL ENCODER 有权
    双数据速率串行编码器

    公开(公告)号：US20080088492A1

    公开(公告)日：2008-04-17

    申请号：US11937913

    申请日：2007-11-09

    申请人： George Wiley ,  Brian Steele ,  Curtis Musfeldt

    发明人： George Wiley ,  Brian Steele ,  Curtis Musfeldt

    IPC分类号： H03M7/00

    CPC分类号： H03M7/16

    摘要： A double data rate serial encoder is provided. The serial encoder comprises a mux having a plurality of inputs, a plurality of latches coupled to the inputs of the mux, an enabler to enable the latches to update their data inputs, and a counter to select one of the plurality of inputs of the mux for output. In another aspect, the mux provides a glitch-less output during input transitions. The mux includes an output selection algorithm optimized based on a priori knowledge of an input selection sequence provided by the counter.

    摘要翻译： 提供双数据速率串行编码器。 串行编码器包括具有多个输入的多路复用器，耦合到多路复用器的输入的多个锁存器，使得锁存器能够更新其数据输入的启动器，以及用于选择多路复用器的多个输入之一的计数器 用于输出。 在另一方面，多路复用器在输入转换期间提供无毛刺输出。 多路复用器包括基于由计数器提供的输入选择序列的先验知识而优化的输出选择算法。

    Methods and systems for updating a buffer
    8.
    发明申请
    Methods and systems for updating a buffer 有权
    用于更新缓冲区的方法和系统

    公开(公告)号：US20060164424A1

    公开(公告)日：2006-07-27

    申请号：US11285399

    申请日：2005-11-23

    申请人： George Wiley ,  Brian Steele

    发明人： George Wiley ,  Brian Steele

    IPC分类号： G09G5/399

    CPC分类号： G09G5/393 ,  G09G5/006

    摘要： The present invention relates to methods and systems for updating a buffer. In one aspect, the present invention provides a method for updating a buffer, which includes strategically writing to the buffer to enable concurrent read and write to the buffer. The method eliminates the need for double buffering, thereby resulting in implementation cost and space savings compared to conventional buffering approaches. The method also prevents image tearing when used to update a frame buffer associated with a display, but is not limited to such applications. In another aspect, the present invention provides efficient mechanisms to enable buffer update across a communication link. In one example, the present invention provides a method for relaying timing information across a communication link.

    摘要翻译： 本发明涉及用于更新缓冲器的方法和系统。 一方面，本发明提供了一种用于更新缓冲器的方法，其包括对缓冲器进行战略性地写入，以实现对缓冲器的并发读取和写入。 该方法消除了对双缓冲的需要，从而与常规缓冲方法相比，导致实现成本和空间节省。 当用于更新与显示器相关联的帧缓冲器时，该方法还防止图像撕裂，但不限于此类应用。 在另一方面，本发明提供了有效的机制来实现跨越通信链路的缓冲器更新。 在一个示例中，本发明提供了一种用于在通信链路上中继定时信息的方法。

    High data rate interface apparatus and method
    9.
    发明申请
    High data rate interface apparatus and method 审中-公开
    高数据速率接口设备和方法

    公开(公告)号：US20060034301A1

    公开(公告)日：2006-02-16

    申请号：US11096855

    申请日：2005-03-31

    申请人： Jon Anderson ,  Brian Steele ,  George Wiley ,  Shashank Shekhar

    发明人： Jon Anderson ,  Brian Steele ,  George Wiley ,  Shashank Shekhar

    IPC分类号： H04L12/56

    CPC分类号： H04W88/02 ,  H04L69/18 ,  H04L69/22 ,  H04M1/72527 ,  Y02D70/144 ,  Y02D70/26

    摘要： A data interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range “serial” type data link, which lends itself to implementation with miniature connectors and thin flexible cables which are especially useful in connecting display elements such as wearable micro-displays to portable computers and wireless communication devices.

    摘要翻译： 一种数据接口，用于通过连接在一起的分组结构通过通信路径在主机和客户端之间传送数字数据，以形成用于传送预先选择的一组数字控制和呈现数据的通信协议。 信号协议被配置为生成，发送和接收形成通信协议的分组的链路控制器使用，并且将数字数据形成为一个或多个类型的数据分组，其中至少一个驻留在主机设备中并耦合到 客户端通过通信路径。 该接口通过短距离“串行”型数据链路提供了经济高效，低功耗，双向，高速的数据传输机制，可实现微型连接器和薄型柔性电缆，这些电缆特别适用于 将可穿戴式微型显示器等显示元件连接到便携式计算机和无线通信装置。

    Wireless modem with CPU and auxiliary processor that shifts control between processors when in low power state while maintaining communication link to wireless network
    10.
    发明授权
    Wireless modem with CPU and auxiliary processor that shifts control between processors when in low power state while maintaining communication link to wireless network 有权
    带有CPU和辅助处理器的无线调制解调器在处于低功率状态时转移处理器之间的控制，同时保持与无线网络的通信链路

    公开(公告)号：US08364857B2

    公开(公告)日：2013-01-29

    申请号：US12551530

    申请日：2009-08-31

    申请人： James Pyers ,  George Wiley ,  James J. Willkie ,  Brian Steele ,  Apul Nahata ,  Karthik Raj Kaliannan

    发明人： James Pyers ,  George Wiley ,  James J. Willkie ,  Brian Steele ,  Apul Nahata ,  Karthik Raj Kaliannan

    IPC分类号： G06F3/00 ,  G06F12/00

    CPC分类号： G06F1/3203 ,  G06F1/3293 ,  Y02D10/122

    摘要： A computing device includes a low power auxiliary processor, such as a processor on a wireless card or sub-system, which is able to takeover processing in place of the computing device's central processing unit (CPU). Operating the computing device on the auxiliary processor draws less power from the computing device battery, enabling extended operation in an auxiliary processor mode. When in this mode, the auxiliary processor controls peripherals and provides the system functionality while the CPU is deactivated, such as in “off,” “standby” or “sleep” modes. In the auxiliary processor mode, the computing device can accomplish useful tasks, such as sending/receiving electronic mail, displaying electronic documents and accessing a network while drawing minimal power from the battery. Transitions between the normal operating mode and auxiliary processor mode may be transparent to users. Such a computer may display instant on, always on and always connected operating features.

    摘要翻译： 计算设备包括能够接管处理代替计算设备的中央处理单元（CPU）的低功率辅助处理器，诸如无线卡或子系统上的处理器。 在辅助处理器上操作计算设备从计算设备电池吸取更少的电力，从而能够在辅助处理器模式下进行扩展操作。 在此模式下，辅助处理器控制外设，并在CPU被关闭时提供系统功能，例如关闭，待机或休眠模式。 在辅助处理器模式中，计算设备可以完成有用的任务，例如发送/接收电子邮件，显示电子文档和访问网络，同时从电池中抽取最小功率。 正常操作模式和辅助处理器模式之间的转换可能对用户来说是透明的。 这样的计算机可以立即显示，始终处于和始终连接的操作特征。