公开(公告)号：US08280340B2

公开(公告)日：2012-10-02

申请号：US12551569

申请日：2009-09-01

申请人： Peiqi Xuan ,  Yifeng Zhang ,  Xuechu Li

发明人： Peiqi Xuan ,  Yifeng Zhang ,  Xuechu Li

IPC分类号： H04B1/28

CPC分类号： H03B19/00 ,  H04B1/0032

摘要： Systems of clock generation for integrated radio frequency receiver. In an integrated radio frequency receiver, a mixer is often used to down convert the incoming radio frequency signal. The down converted signal is then digitized and digital signal processing circuitry is used for efficient and flexible implementation of various functions to receive the underlying audio and/or data information. The mixer requires clock generation circuitry to provide a proper local oscillator signal for a selected channel. On the other hand, the digital signal processing circuitry requires its separate digital clock for proper operations. The clock generation system utilizes single local oscillator generation circuitry to provide the local oscillator signals required by the mixer and the digital clock signals required by the digital signal processing circuitry. In order to maintain a fixed frequency for the digital clock signal regardless channel selection, a fractional divider coupled with sigma-delta circuitry is used to derive the digital clock signal.

摘要翻译： 集成射频接收机的时钟发生系统。 在集成射频接收机中，通常使用混频器来降低转换输入的射频信号。 然后将经降频转换的信号数字化，并且使用数字信号处理电路来有效和灵活地实现用于接收底层音频和/或数据信息的各种功能。 混频器需要时钟产生电路为选定的信道提供适当的本地振荡器信号。 另一方面，数字信号处理电路需要其单独的数字时钟来进行适当的操作。 时钟发生系统使用单个本地振荡器产生电路来提供混频器所需的本地振荡器信号和数字信号处理电路所需的数字时钟信号。 为了保持数字时钟信号的固定频率，不管信道选择，使用与Σ-Δ电路耦合的分数分频器来导出数字时钟信号。

公开(公告)号：US20110053534A1

公开(公告)日：2011-03-03

申请号：US12551569

申请日：2009-09-01

申请人： Peiqi Xuan ,  Yifeng Zhang ,  Xuechu Li

发明人： Peiqi Xuan ,  Yifeng Zhang ,  Xuechu Li

IPC分类号： H04B1/26

CPC分类号： H03B19/00 ,  H04B1/0032

摘要： Systems of clock generation for integrated radio frequency receiver. In an integrated radio frequency receiver, a mixer is often used to down convert the incoming radio frequency signal. The down converted signal is then digitized and digital signal processing circuitry is used for efficient and flexible implementation of various functions to receive the underlying audio and/or data information. The mixer requires clock generation circuitry to provide a proper local oscillator signal for a selected channel. On the other hand, the digital signal processing circuitry requires its separate digital clock for proper operations. The clock generation system utilizes single local oscillator generation circuitry to provide the local oscillator signals required by the mixer and the digital clock signals required by the digital signal processing circuitry. In order to maintain a fixed frequency for the digital clock signal regardless channel selection, a fractional divider coupled with sigma-delta circuitry is used to derive the digital clock signal.

摘要翻译： 集成射频接收机的时钟发生系统。 在集成射频接收机中，通常使用混频器来降低转换输入的射频信号。 然后将经降频转换的信号数字化，并且使用数字信号处理电路来有效和灵活地实现用于接收底层音频和/或数据信息的各种功能。 混频器需要时钟产生电路为选定的信道提供适当的本地振荡器信号。 另一方面，数字信号处理电路需要其单独的数字时钟来进行适当的操作。 时钟发生系统利用单个本地振荡器产生电路来提供混频器所需的本地振荡器信号和数字信号处理电路所需的数字时钟信号。 为了保持数字时钟信号的固定频率，不管信道选择，使用与Σ-Δ电路耦合的分数分频器来导出数字时钟信号。

公开(公告)号：US20120025921A1

公开(公告)日：2012-02-02

申请号：US12893280

申请日：2010-09-29

申请人： Yu Yang ,  Xuechu Li ,  Peiqi Xuan

发明人： Yu Yang ,  Xuechu Li ,  Peiqi Xuan

IPC分类号： H03B5/12

CPC分类号： H03B5/1228 ,  H03B5/1212 ,  H03B5/1243 ,  H03B2200/0062

摘要： A low noise VCO circuit for an LC VCO circuit comprising MOS varactors is disclosed. The LC VCO circuit usually comprises an LC tuning circuit coupled with a pair of cross-coupled transistors used as a negative impedance element. A pair of varactors is used to provide fine tuning by applying a control voltage to the varactor. Since the varactor is also coupled to the pair of cross-coupled transistor, the process variation and temperature change may affect the bias voltage coupled to the pair of varactors. Therefore, a bias circuit usually is used to alleviate the impact of process variation and temperature change associated with the pair of transistor. Nevertheless, the bias voltage typically is implemented by providing a current flowing through a resistor, wherein the current is generated by a current source. The noise associated with the current source will affect the performance of the VCO circuit. A low noise VCO circuit is disclosed which utilizes a low noise bias circuit. The low noise bias circuit comprises a current source, a load device and a voltage divider wherein the load device is coupled to the voltage divider in parallel. The load device may be implemented using a bipolar transistor or a diode-connected MOS device.

摘要翻译： 公开了一种用于包括MOS可变电抗器的LC VCO电路的低噪声VCO电路。 LC VCO电路通常包括与用作负阻抗元件的一对交叉耦合晶体管耦合的LC调谐电路。 一对变容二极管用于通过对变容二极管施加控制电压来提供微调。 由于变容二极管还耦合到一对交叉耦合晶体管，所以工艺变化和温度变化可能影响耦合到该对变容二极管的偏置电压。 因此，偏置电路通常用于减轻与该对晶体管相关的工艺变化和温度变化的影响。 然而，偏置电压通常通过提供流过电阻器的电流来实现，其中电流由电流源产生。 与电流源相关的噪声将影响VCO电路的性能。 公开了一种利用低噪声偏置电路的低噪声VCO电路。 低噪声偏置电路包括电流源，负载装置和分压器，其中负载装置并联耦合到分压器。 负载装置可以使用双极晶体管或二极管连接的MOS器件来实现。

公开(公告)号：US20120001699A1

公开(公告)日：2012-01-05

申请号：US12872195

申请日：2010-08-31

申请人： Yu Yang ,  Xuechu Li ,  Rong Liu ,  Peiqi Xuan

发明人： Yu Yang ,  Xuechu Li ,  Rong Liu ,  Peiqi Xuan

IPC分类号： H03B5/12

CPC分类号： H03B5/1228 ,  H03B5/1212 ,  H03B5/1243

摘要： Voltage controlled oscillator (VCO) has been widely used in radio frequency communication systems. In a typical VCO implementation, a pair of directly cross-coupled MOS transistors is used as a switching device and an LC resonant circuit is used to tune the desired frequency. The direct cross coupling of the MOS transistor pair will result in limited output voltage swing since a large swing may cause the MOS transistors into a linear region to increase phase noise. The VCO system to increase the output voltage swing according to one embodiment of the present invention includes DC-blocking capacitors to avoid direct cross coupling of the MOS pair. The VCO further includes circuit to provide bias for the gate voltage of the MOS pair. A method for increasing the output voltage swing is disclosed for a VCO system having LC resonant circuit. The method includes providing DC-blocked cross coupling from the drains of the cross-coupled transistor pair to the gates of the cross-coupled transistor pair. The method also includes providing an offset voltage to the gates of the cross-coupled transistor pair to reduce the maximum gate-to-drain voltage of a cross-coupled NMOS transistor pair or maximum drain-to-gate voltage of a cross-coupled PMOS transistor pair so that the cross-coupled transistor pair will work in a saturation region when the output voltage swing is increased.

摘要翻译： 压控振荡器（VCO）已广泛应用于射频通信系统。 在典型的VCO实现中，使用一对直接交叉耦合的MOS晶体管作为开关器件，并且使用LC谐振电路来调谐期望的频率。 MOS晶体管对的直接交叉耦合将导致有限的输出电压摆幅，因为大的摆幅可能导致MOS晶体管进入线性区域以增加相位噪声。 根据本发明的一个实施例的用于增加输出电压摆幅的VCO系统包括隔直电容器以避免MOS对的直接交叉耦合。 VCO还包括为MOS对的栅极电压提供偏置的电路。 对于具有LC谐振电路的VCO系统，公开了一种用于增加输出电压摆幅的方法。 该方法包括从交叉耦合晶体管对的漏极到交叉耦合晶体管对的栅极提供DC阻塞的交叉耦合。 该方法还包括向交叉耦合晶体管对的栅极提供偏移电压以减小交叉耦合NMOS晶体管对的最大栅极至漏极电压或交叉耦合PMOS的最大漏极 - 栅极电压 晶体管对，使得当输出电压摆幅增加时，交叉耦合晶体管对将在饱和区域中工作。

公开(公告)号：US08238844B2

公开(公告)日：2012-08-07

申请号：US12473281

申请日：2009-05-28

申请人： Yifeng Zhang ,  Tracey Lee Chavers ,  Peiqi Xuan ,  Qifa Wu

发明人： Yifeng Zhang ,  Tracey Lee Chavers ,  Peiqi Xuan ,  Qifa Wu

IPC分类号： H03C1/62 ,  H04B17/00 ,  H04B1/18 ,  H04W4/00

CPC分类号： H04B1/034 ,  H03J1/0091

摘要： FM radio transmitter is being widely used in portable devices as a convenient way to output audio contents to ubiquitously available FM radio receivers in cars or homes. However, the signal from the FM radio transmitter may be interfering with the signal being broadcast by an FM radio station. A scan system is incorporated into the FM radio transmitter to quickly and reliably identify a vacant channel for the FM radio transmitter to use. The scan system measures on-channel and out-of-channel signal quality and selects a best channel for transmission based on the measured on-channel and out-of-channel signal quality. The scan system is also incorporated into an FM radio receiver to quickly and reliably tune to a valid channel. The scan system selects the valid channel based on the measured on-channel and out-of-channel signal quality.

摘要翻译： FM无线电发射机正在便携式设备中广泛使用，以便将音频内容输出到汽车或家庭中普遍可用的FM无线电接收机。 然而，来自FM无线电发射机的信号可能干扰由FM无线电台广播的信号。 扫描系统被并入FM无线电发射机，以快速可靠地识别用于FM无线电发射机使用的空闲信道。 扫描系统测量通道和通道外信号质量，并根据测量的通道和通道外信号质量选择最佳传输通道。 扫描系统也被并入到FM无线电接收机中以快速可靠地调谐到有效信道。 扫描系统基于所测量的在线信道和信道外信号质量来选择有效信道。

公开(公告)号：US20120026407A1

公开(公告)日：2012-02-02

申请号：US13116532

申请日：2011-05-26

申请人： Yifeng Zhang ,  Rong Liu ,  Peiqi Xuan ,  Xiaodong Jin

发明人： Yifeng Zhang ,  Rong Liu ,  Peiqi Xuan ,  Xiaodong Jin

IPC分类号： H04N5/50 ,  H04B1/16 ,  H04B1/06

CPC分类号： H04B1/30 ,  H04B1/0032 ,  H04B1/406 ,  H04N5/46 ,  H04N21/42638

摘要： A configurable multi-standard receiver. A receiver comprises a mixer, a processing module and an analog to digital converter is disclosed to receive multi-standard radio signals. The processing module includes a first selection switch and first parameter control, where the first selection switch configures the processing module as a complex filter or a real-valued filter and the first parameter control configures the characteristics of the filter. Furthermore, the analog to digital converted is preferably implemented using sigma delta modulation to achieve a desired noise shaping. The sigma delta modulation comprises a second selection switch and second parameter control. The second selection switch configures the sigma delta modulation to function as a unit having a complex loop filter or a unit having real-valued loop filters. The second parameter control configures the characteristics of the loop filter. The settings for the first and second selection switches and the first and second control parameters may be stored in a control register.

摘要翻译： 可配置的多标准接收器。 接收机包括混频器，处理模块和模数转换器，用于接收多标准无线电信号。 处理模块包括第一选择开关和第一参数控制，其中第一选择开关将处理模块配置为复数滤波器或实值滤波器，并且第一参数控制器配置滤波器的特性。 此外，优选地，使用Σ-Δ调制来实现模数转换，以实现期望的噪声整形。 Σ-Δ调制包括第二选择开关和第二参数控制。 第二选择开关将Σ-Δ调制配置为具有复环路滤波器或具有实值环路滤波器的单元的单元。 第二个参数控制配置环路滤波器的特性。 第一和第二选择开关以及第一和第二控制参数的设置可以存储在控制寄存器中。

公开(公告)号：US08422409B2

公开(公告)日：2013-04-16

申请号：US12895143

申请日：2010-09-30

申请人： Hangwei Guo ,  Yifeng Zhang ,  Peiqi Xuan

发明人： Hangwei Guo ,  Yifeng Zhang ,  Peiqi Xuan

IPC分类号： H04B7/005 ,  H04B1/44 ,  H04W4/00 ,  H04J3/02

CPC分类号： H04B1/40 ,  H04B1/034

摘要： A device and method of duplex audio communication over a broadcast channel are disclosed. Low-power transmission over a broadcast channel is permissible for personal use as long as the transmitted power level is below a level allowed by respective regulatory. For example, low-power FM transmitter can be used to provide a wireless audio link between two audio devices. One such application scenario is a wireless speakerphone used as an audio extension from a cellphone for group conference purposes. Such applications face issues of potential interference from other users of the same channel and the need of manually selecting and tuning a pair of channels. The device and method disclosed in the present invention use the clear channel technique to automatically select an un-occupied channel for the transmit side and utilizes an identification embedded in a sub-channel to allow the receiver to automatically tune to the channel used by the transmitter. The clear channels may be determined by respective transceivers or determined by a master transceiver.

摘要翻译： 公开了一种通过广播信道进行双工音频通信的设备和方法。 只要发射功率水平低于相关监管机构允许的水平，就可以在广播频道上进行低功率传输。 例如，低功率FM发射机可用于在两个音频设备之间提供无线音频链路。 一种这样的应用场景是用作用于组会议目的的手机的音频扩展的无线扬声器。 这样的应用程序面临来自相同信道的其他用户的潜在干扰的问题以及手动选择和调谐一对信道的需要。 在本发明中公开的设备和方法使用清晰的信道技术来自动选择用于发射侧的未占用信道，并利用嵌入在子信道中的标识来允许接收机自动调谐到由发射机使用的信道 。 清除信道可以由相应的收发器确定或由主收发器确定。

公开(公告)号：US08595538B2

公开(公告)日：2013-11-26

申请号：US12041543

申请日：2008-03-03

申请人： Yifeng Zhang ,  Peiqi Xuan ,  Kanyu Cao ,  Xiaodong Jin

发明人： Yifeng Zhang ,  Peiqi Xuan ,  Kanyu Cao ,  Xiaodong Jin

IPC分类号： G06F1/00 ,  G06F1/04 ,  H03L7/06

CPC分类号： H03L7/099 ,  H03L2207/12

摘要： In an embodiment of the present invention, a clock generator circuit is disclosed to include a phase locked loop (PLL) that is responsive to a reference frequency and operative to generate a single clock frequency and a clock signal quadrature output frequency and a clock signal in-phase output with the frequency of the clock signal quadrature output frequency and the clock signal in-phase output frequency being a fraction of the frequency of the single clock frequency. The PLL includes a single voltage controlled oscillator (VCO) that generates the single clock frequency. A plurality of dividers is included in the clock generator circuit and is responsive to the clock signal quadrature output frequency and the clock signal in-phase output frequency and generates multiple clock frequencies, each clock frequency being a unique frequency, each of the plurality of dividers generating an output, the final output of the plurality of dividers being synchronized to the reference frequency.

摘要翻译： 在本发明的实施例中，公开了一种时钟发生器电路，其包括响应于参考频率并且可操作以产生单个时钟频率和时钟信号正交输出频率的锁相环（PLL）和时钟信号 相位输出与时钟信号的频率正交输出频率和时钟信号同相输出频率是单个时钟频率频率的一部分。 PLL包括产生单个时钟频率的单个压控振荡器（VCO）。 多个分频器被包括在时钟发生器电路中，并且响应于时钟信号正交输出频率和时钟信号同相输出频率，并且产生多个时钟频率，每个时钟频率是唯一的频率，每个分频器 产生输出，多个分频器的最终输出与参考频率同步。

公开(公告)号：US20120238228A1

公开(公告)日：2012-09-20

申请号：US13485907

申请日：2012-05-31

申请人： Yifeng Zhang ,  Tracey Lee Chavers ,  Peiqi Xuan ,  Qifa Wu

发明人： Yifeng Zhang ,  Tracey Lee Chavers ,  Peiqi Xuan ,  Qifa Wu

IPC分类号： H04B1/18

CPC分类号： H04B1/034 ,  H03J1/0091

摘要： FM radio transmitter is being widely used in portable devices as a convenient way to output audio contents to ubiquitously available FM radio receivers in cars or homes. However, the signal from the FM radio transmitter may be interfering with the signal being broadcast by an FM radio station. A scan system is incorporated into the FM radio transmitter to quickly and reliably identify a vacant channel for the FM radio transmitter to use. The scan system measures on-channel and out-of-channel signal quality and selects a best channel for transmission based on the measured on-channel and out-of-channel signal quality. The scan system is also incorporated into an FM radio receiver to quickly and reliably tune to a valid channel. The scan system selects the valid channel based on the measured on-channel and out-of-channel signal quality.

摘要翻译： FM无线电发射机正在便携式设备中广泛使用，以便将音频内容输出到汽车或家庭中普遍可用的FM无线电接收机。 然而，来自FM无线电发射机的信号可能干扰由FM无线电台广播的信号。 扫描系统被并入FM无线电发射机，以快速可靠地识别用于FM无线电发射机使用的空闲信道。 扫描系统测量通道和通道外信号质量，并根据测量的通道和通道外信号质量选择最佳传输通道。 扫描系统也被并入到FM无线电接收机中以快速可靠地调谐到有效信道。 扫描系统基于所测量的在线信道和信道外信号质量来选择有效信道。

公开(公告)号：US20110159835A1

公开(公告)日：2011-06-30

申请号：US12649345

申请日：2009-12-30

申请人： Peiqi Xuan ,  Yifeng Zhang

发明人： Peiqi Xuan ,  Yifeng Zhang

IPC分类号： H04B1/26 ,  H03L7/00 ,  H03L7/06

CPC分类号： H03L7/22 ,  H03L7/0805 ,  H03L7/0991 ,  H03L7/10 ,  H03L7/183

摘要： Systems and methods of clock generation for radio frequency receiver. In radio frequency receiver, the system requires accurate local oscillating (LO) signal and system clocks for proper operation and to ensure high quality performance. In order to achieve accurate LO frequency and system clock, a crystal or and accurate reference clock is provide to the clock generation circuit. How a low-cost receiver, it is desirable to eliminate the requirement for a crystal or an accurate reference clock. The present invention discloses systems and methods to utilize a pilot signal embedded in the transmitted signal. The pilot signal usually has very accurate frequency which is particular true for broadcast system such as FM broadcast. In various embodiments of the present invention, the systems and methods measure the relation between the frequency of the pilot signal and the current clock generated. The measured result is compared with a know relation corresponding to the frequency of the pilot signal and the target clock signal and the result is used to adjust the clock generation circuit.

摘要翻译： 无线电频率接收机的时钟发生系统和方法。 在射频接收机中，系统需要精确的本地振荡（LO）信号和系统时钟，以便正常运行，并确保高质量的性能。 为了实现准确的LO频率和系统时钟，提供晶体或精确的参考时钟给时钟发生电路。 低成本接收机如何消除晶体或精确参考时钟的要求。 本发明公开了利用嵌入发射信号中的导频信号的系统和方法。 导频信号通常具有非常精确的频率，这对于诸如FM广播的广播系统尤其如此。 在本发明的各种实施例中，系统和方法测量导频信号的频率与所产生的当前时钟之间的关系。 将测量结果与对应于导频信号和目标时钟信号的频率的已知关系进行比较，并将结果用于调整时钟产生电路。