摘要:
A circuit, for digitizing an analogue signal includes an analogue to digital converter, a clip processor adapted to estimate a value for clipped digital signal samples, and a buffer adapted to dynamically store a plurality of digitized samples produced by the analogue to digital converter. The clip processor is adapted to read digitized samples from the buffer and replace clipped digitized samples with the estimated values, thereby mitigating the effects of clipping in an output of the circuit.
摘要:
One problem, frequently encountered with VDSL transmission systems, is that upstream FEXT produced by system users having short wires can be very strong. Users having shorter wires get high bit rates whereas users having longer wires get low bit rates. In extreme cases it may happen that users with wire lengths greater than 1000 meter cannot transmit data upstream. The present invention provides a VDST transmission system with a plurality of modems. The modems are located at varying distances from a central station. There is a target bit rate for each modem. That modems on shorter wires have control means for reducing their transmit power. This reduces the FEXT produced by these modems enabling modems on longer wires to transmit at higher bit rates.
摘要:
In a multi-carrier system employing OFDM, for example DMT, an adaptive channel equalizer is normally used, operating in the frequency domain. The sampling clock is controlled so that the time delay between the transmitter and the receiver is effectively eliminated. If the information used to control the sampling clock is received from the equalized data stream, it will introduce an ambiguity between the operation of the channel equalizer and the mechanism used to control the sampling clock. Operation of the equalizer can mask an increasing time difference, between transmitter and receiver, which the sample clock controller should be tracking. The present invention eliminates the ambiguities in the operation of the equalizer and sample clock controller by preventing the equalizer from accepting time differences which should be corrected by operation of the sample clock controller.
摘要:
Zipper is the time-synchronized frequency-division duplex implementation of discrete multi-tome (DMT) modulation. Two communicating Zipper modems transmit DMT symbols simultaneously with a common clock. When all transmitters are time synchronized, the near end cross-talk (NEXT) and near end echoes injected into the received signal are orthogonal to the desired signal. The present invention provides a telecommunications transmission system using zipper and having at least two VDSL systems. Each VDSL system comprises a pair of zipper modems communicating over a cable transmission path. The telecommunications transmission system handles zipper transmission transmitted over the common cable; at least partly mitigates NEXT; and permits transmissions in a first VDSL system which are asynchronous with transmissions in a second VDSL system.
摘要:
A VDSL-modem which is divided into an analog part which is placed in an optical node and a digital part which is placed in a local station. The analog part of the VDSL-modem includes an A/D-converter and D/A-converter, a filter, an amplifier, a hybrid/balun, an adaptive noise attenuator, an optical interface, and possibly an echo canceller. The digital part of the modem includes an FFT/IFFT-processor, a synchronizer, an equalizer, an interleaving unit, an error correction unit, a protocol manager, and an optical interface. The VDSL-modem simplifies synchronization of the modem and reduces power consumption in the optical node. A multiplexor function in the optical node in addition is simpler because it need not manage a protocol.
摘要:
The hybrid circuit can be used to substantially reduce near echo signals. The circuit includes a balanced 2-wire to 4-wire hybrid for interconnecting a two wire receive path and a two wire transmit path to a two wire transmission line. The two wire receive path connects the balanced hybrid to an A/D converter and the two wire transmit path connects a D/A converter to the balanced hybrid. The two wire receive path contains a filter, dimensioned to remove signals transmitted from the D/A converter. The invention is particularly adapted for use with FDD and OFDD.
摘要:
A multi-carrier transmission system using DMT. It is known to recover a receiver sample and clock from a reserved carrier, a pilot carrier having a fixed phase. A sampling clock oscillator in a receiver is then phase locked to the pilot carrier. Multi-carrier receivers, such as DMT receivers, are normally equipped with an FFT processor. A complex number representing the pilot carrier is then available from the FFT processor output. If an FFT processor is not available, a one frequency DFT processor can be provided to produce a complex estimate of the pilot carrier. In a DMT system, frame synchronization is handled separately from sampling clock synchronization, although the two processes are intimately related and frame synchronization must be acquired before sampling clock synchronization.
摘要:
When delivering a broadband service, such as xDSL, without inband POTS, it is necessary to separate the analogue POTS signal and the xDSL signal from each other at both the CO (Central Office) and the CP (Customer's Premises). This can be achieved by using an active POTS splitter. The present invention incorporates test functionality for the line between the CP and the CO, or ONU (Optical Network Unit), in the POTS splitter. This enables two-sided measurements on the line, both during installation and during operation. The measurements are performed at the CO and upon request, or when the test device automatically sends a test message/signal. In this way there is no need for field technicians at the CP side. The POTS splitter can have a unique identity code that is transmitted to the CO each time a test is started, or on receipt of a request from the CO.
摘要:
An arrangement for synchronization of nodes in VDSL-systems, or more exactly, synchronization of optical VDSL-nodes which share a common part of a cable in the access network between subscribers and a local station. A time synchronization is provided towards an external system, for instance GPS, which gives a time reference by which the different nodes can be synchronized. The synchronization reduces the near end cross-talk between the VDSL-systems in the different nodes. Preferably, each respective node includes a receiver for a synchronization signal and an internal oscillator with high stability to deliver a stable clock signal.
摘要:
A multi-carrier transmission system using orthogonal carriers with high order QAM constellations for the transmission of multiple bits per carrier and symbol. Such systems place high demands on the synchronization of the receiver with the transmitter. The maximum permitted deviation from exact synchronization is usually a small fraction of a sampling interval. A reserve carrier, the pilot carrier, which is given a fixed phase, is usually used as the reference to achieve this high accuracy. The receiver sampling clock oscillator is phase locked to the pilot carrier. It is therefore necessary to estimate the phase of the pilot carrier. Using a bandpass filter to recover the pilot carrier, regardless of the frame structure of the DMT signal, does not eliminate the influence of neighboring carriers on the pilot carrier.