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    Imaging head and imaging system
    1.
    发明申请
    Imaging head and imaging system 审中-公开
    成像头和成像系统

    公开(公告)号：US20060197867A1

    公开(公告)日：2006-09-07

    申请号：US11070685

    申请日：2005-03-02

    申请人： Peter Johnson ,  Mark Pfitzner ,  Simon Ratcliffe ,  James Howarth

    发明人： Peter Johnson ,  Mark Pfitzner ,  Simon Ratcliffe ,  James Howarth

    IPC分类号： H04N5/225 ,  H04N5/232

    CPC分类号： H04N5/232 ,  F16M11/10 ,  F16M11/18 ,  F16M11/2014 ,  G01S7/4811 ,  G01S7/4817 ,  G01S17/023 ,  H04N5/2226 ,  H04N5/2251 ,  H04N5/23238

    摘要： An imaging head for an imaging system and a method of obtaining a three-dimensional image with the head and system. The imaging head consists of a digital camera and laser rangefinder fixedly aligned on a common boresight. A rotation stage rotates the camera and rangefinder together as they acquire range and image data of a selected scene. The data is combined to produce the three-dimensional image without the need for a separate calibration process. The method alows a low resolution scan to be made of a scene and an area to be selected for a high resolution scan. The method also allows a number of scans from different positions to be knitted into a single image to overcome line-of-sight limitations.

    摘要翻译： 用于成像系统的成像头和用头部和系统获得三维图像的方法。 成像头由数码相机和激光测距仪组成，固定对准在公共视轴上。 旋转台在获取所选场景的范围和图像数据的同时将相机和测距仪一起旋转。 数据被组合以产生三维图像，而不需要单独的校准过程。 该方法使得对于高分辨率扫描要选择的场景和区域进行低分辨率扫描。 该方法还允许将来自不同位置的多个扫描编织成单个图像以克服视距限制。

    Replacement of passive electrical components
    3.
    发明申请
    Replacement of passive electrical components 审中-公开
    无源电器组件更换

    公开(公告)号：US20060176350A1

    公开(公告)日：2006-08-10

    申请号：US11331186

    申请日：2006-01-13

    申请人： James Howarth ,  Chuck Edwards ,  Karel Vanheusden

    发明人： James Howarth ,  Chuck Edwards ,  Karel Vanheusden

    IPC分类号： B41J2/01

    CPC分类号： B41J2/01 ,  B41J2202/04 ,  H01C17/065 ,  H05K1/095 ,  H05K1/16 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K1/181 ,  H05K3/125 ,  H05K2201/09763 ,  H05K2203/013 ,  H05K2203/1453

    摘要： A process of fabricating a passive electrical component, such as a resistor, a capacitor, or an inductor, is provided. The process includes the step of ink-jet printing at least one electronic ink onto a substrate in a predetermined pattern. The step of ink-jet printing may include the steps of: a) selecting at least one electronic ink having at least one electrical characteristic when cured; b) determining a positional layout for a plurality of droplets of the at least one electronic ink such that, when the at least one electronic ink has been cured, the positional layout provides a desired response for the electrical component; c) printing each of the plurality of droplets of the at least one electronic ink onto the substrate according to the positional layout using an ink-jet printing process; and d) curing the at least one electronic ink.

    摘要翻译： 提供了制造无源电部件的工艺，例如电阻器，电容器或电感器。 该方法包括以预定图案将至少一种电子墨水喷墨印刷到基底上的步骤。 喷墨印刷的步骤可以包括以下步骤：a）选择至少一种在固化时具有至少一种电特性的电子墨水; b）确定所述至少一个电子墨水的多个液滴的位置布局，使得当所述至少一个电子墨水已经固化时，所述位置布局为所述电气部件提供期望的响应; c）使用喷墨打印方法根据所述位置布局将所述至少一个电子墨水的所述多个液滴中的每一个印刷到所述基板上; 以及d）固化所述至少一个电子墨水。

    Stacked printed circuit board memory module and method of augmenting memory therein
    4.
    发明授权
    Stacked printed circuit board memory module and method of augmenting memory therein 有权
    堆叠印刷电路板存储器模块及其中增加存储器的方法

    公开(公告)号：US06418034B1

    公开(公告)日：2002-07-09

    申请号：US09995936

    申请日：2001-11-27

    申请人： Rick Weber ,  Corey Larsen ,  James Howarth

    发明人： Rick Weber ,  Corey Larsen ,  James Howarth

    IPC分类号： H05K114

    CPC分类号： H05K1/144 ,  H01R12/52 ,  H05K7/023

    摘要： A stacked printed circuit board memory module in which a plurality of daughter circuit boards can be stacked onto a primary circuit board. The primary board and each of the plurality of daughter boards have electronic memory ICs mounted on the respective surfaces. The primary board and each of the daughter boards have mounted connectors so that the boards can be electronically and mechanically interconnected with another board.

    摘要翻译： 一种叠层印刷电路板存储模块，其中多个子电路板可堆叠在主电路板上。 主板和多个子板中的每一个具有安装在各个表面上的电子存储器IC。 主板和每个子板已经安装了连接器，使得板可以与另一个板电子和机械地互连。

    Checking sequential logic circuits
    5.
    发明授权
    Checking sequential logic circuits 失效
    检查顺序逻辑电路

    公开(公告)号：US4556976A

    公开(公告)日：1985-12-03

    申请号：US517643

    申请日：1983-07-27

    申请人： James Howarth

    发明人： James Howarth

    IPC分类号： G06F11/08 ,  G06F11/28 ,  G06F11/00

    CPC分类号： G06F11/28 ,  G06F11/085

    摘要： A sequential logic circuit includes means for checking, while the circuit is in operation, that it is stepping correctly from one state to the next. The current state of the circuit is encoded as X0-X3. That encoded value is compared with a predicted value Y0-Y3 derived in response to the previous state of the circuit itself and those signals that cause the transition from the previous to the current state. If the two do not match the circuit has not stepped to the correct state. Reduction in hardware is achieved by allowing certain states to share the same encoded value.

    摘要翻译： 顺序逻辑电路包括用于在电路处于工作状态时检查其从一个状态到下一个状态正确地步进的装置。 电路的当前状态被编码为X0-X3。 该编码值与响应于电路本身的先前状态而导出的预测值Y0-Y3和导致从先前到当前状态的转换的那些信号进行比较。 如果两个不匹配的电路没有走到正确的状态。 通过允许某些状态共享相同的编码值来实现硬件的减少。

    Optimized multi-layer printing of electronics and displays
    6.
    发明申请
    Optimized multi-layer printing of electronics and displays 失效
    电子和显示器的优化多层印刷

    公开(公告)号：US20060159899A1

    公开(公告)日：2006-07-20

    申请号：US11331187

    申请日：2006-01-13

    申请人： Chuck Edwards ,  James Howarth ,  Karel Vanheusden

    发明人： Chuck Edwards ,  James Howarth ,  Karel Vanheusden

    IPC分类号： B32B3/00 ,  B32B18/00

    CPC分类号： H05K3/1275 ,  H05K1/095 ,  H05K1/16 ,  H05K3/12 ,  H05K3/1216 ,  H05K3/125 ,  H05K3/4664 ,  H05K2201/0326 ,  H05K2203/0113 ,  H05K2203/013 ,  H05K2203/0143 ,  H05K2203/0534 ,  H05K2203/1476 ,  Y10T428/24917 ,  Y10T428/24926

    摘要： An apparatus and method for making a printed circuit board comprising a substrate and an electrical circuit is provided. The circuit is formed by deposition of a plurality of electronic inks onto the substrate and curing of each of the electronic inks. The deposition may be performed using an ink-jet printing process. The inkjet printing process may include the step of printing a plurality of layers, wherein a first layer includes at least one electronic ink deposited directly onto the substrate, and wherein each subsequent layer includes at least one electronic ink deposited on top of at least a portion of a previous layer when the previous layer has been cured. One or more of the layers may include at least two of the electronic inks.

    摘要翻译： 提供一种用于制造包括基板和电路的印刷电路板的装置和方法。 电路通过将多个电子墨水沉积到基板上并固化每个电子墨水而形成。 可以使用喷墨印刷方法进行沉积。 喷墨印刷方法可以包括打印多个层的步骤，其中第一层包括直接沉积到基材上的至少一个电子油墨，并且其中每个后续层包括沉积在至少一部分的顶部上的至少一个电子油墨 的上一层已经被治愈了。 一个或多个层可以包括至少两个电子墨水。

    Circuit modeling and selective deposition
    7.
    发明申请
    Circuit modeling and selective deposition 审中-公开
    电路建模和选择性沉积

    公开(公告)号：US20060158478A1

    公开(公告)日：2006-07-20

    申请号：US11331188

    申请日：2006-01-13

    申请人： James Howarth ,  Chuck Edwards ,  Karel Vanheusden

    发明人： James Howarth ,  Chuck Edwards ,  Karel Vanheusden

    IPC分类号： B41J29/393

    CPC分类号： H05K3/125 ,  H05K1/16 ,  H05K3/0005 ,  H05K2203/013 ,  H05K2203/163

    摘要： A process for fabricating an electrical component using an ink-jet printing process is provided. The process includes the steps of selecting at least one electronic ink having at least a first functionality when cured; determining a positional layout for a plurality of droplets of the electronic ink(s) such that, based at least on the first functionality, the positional layout provides a desired response for the electrical component; providing at least a first characteristic that relates to the electrical component; comparing the determined positional layout to at least one corresponding entry in a lookup table of empirical data relating to the first characteristic and to the determined positional layout; adjusting the determined positional layout accordingly; and printing each of the droplets of the electronic ink(s) onto a substrate according to the adjusted positional layout. The step of determining a positional layout may include determining a volume of ink to be deposited.

    摘要翻译： 提供了一种使用喷墨打印方法制造电气部件的工艺。 该方法包括在固化时选择至少一种具有至少第一功能性的电子墨水的步骤; 确定电子墨水的多个液滴的位置布局，使得至少基于第一功能性，位置布局为电气部件提供期望的响应; 提供至少与电气部件相关的第一特性; 将确定的位置布局与有关第一特征和确定的位置布局的经验数据的查找表中的至少一个对应条目进行比较; 相应调整确定的位置布局; 并且根据调整的位置布局将电子墨水的每个液滴印刷到基底上。 确定位置布局的步骤可以包括确定要沉积的墨水的体积。

    Ink-jet printing of compositionally non-uniform features
    8.
    发明申请
    Ink-jet printing of compositionally non-uniform features 审中-公开
    喷墨打印的组成不均匀的特征

    公开(公告)号：US20060158497A1

    公开(公告)日：2006-07-20

    申请号：US11331237

    申请日：2006-01-13

    申请人： Karel Vanheusden ,  James Howarth ,  Chuck Edwards

    发明人： Karel Vanheusden ,  James Howarth ,  Chuck Edwards

    IPC分类号： G01D11/00

    CPC分类号： H05K3/125 ,  H01L51/0022 ,  H05K1/024 ,  H05K1/16 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/323 ,  H05K3/4664 ,  H05K2201/0187 ,  H05K2201/0269 ,  H05K2203/013 ,  H05K2203/1476

    摘要： A process for fabricating an electrical component having at least one anisotropic electrical quality is provided. The process includes the step of ink-jet printing a plurality of dots of each of at least two electronic inks in a predetermined pattern such that the anisotropic electrical quality is manifested. The ink-jet printing step may further include the steps of: selecting a first electronic ink having a known first electrical characteristic; selecting a second electronic ink having a known second electrical characteristic; determining a positional layout for each of a plurality of dots for each of the first and second electronic inks such that the determined positional layout provides a response of the electrical component in accordance with the anisotropic electrical quality; and printing each of the plurality of dots of each of the first and second electronic inks onto a substrate according to the determined positional layout.

    摘要翻译： 提供一种用于制造具有至少一种各向异性电气质量的电气部件的工艺。 该方法包括以预定图案喷墨打印至少两种电子墨水中的每一个的多个点的步骤，使得各向异性电气质量得以体现。 喷墨打印步骤还可以包括以下步骤：选择具有已知的第一电特性的第一电子墨水; 选择具有已知第二电特性的第二电子墨水; 确定所述第一和第二电子墨水中的每一个的多个点中的每一个的位置布局，使得所确定的位置布局根据所述各向异性电气质量提供所述电气部件的响应; 并且根据确定的位置布局将每个第一和第二电子墨水的多个点中的每一个打印到基底上。

    Corrective adjustment of recording characteristics in digital renditions of analog recordings
    9.
    发明申请
    Corrective adjustment of recording characteristics in digital renditions of analog recordings 有权
    模拟录音数字转换中录音特性的纠正调整

    公开(公告)号：US20060001991A1

    公开(公告)日：2006-01-05

    申请号：US10530511

    申请日：2003-10-06

    申请人： James Howarth ,  Patrick Wolfe ,  Darryl Curley ,  Timothy Rector

    发明人： James Howarth ,  Patrick Wolfe ,  Darryl Curley ,  Timothy Rector

    IPC分类号： G11B5/00

    CPC分类号： G11B5/027 ,  G11B20/10 ,  G11B20/10527 ,  G11B20/18 ,  G11B20/225

    摘要： A signal reconstruction technique is used to correct for wow and flutter in analog audio recordings. Elements of the recording are used to generate a signal for correcting the output. Involves locating modulated entities such as bias signal (e.g. frequency-modulated, amplitude-modulated, or phase-modulated entities) in the recording, extracting them, and utilizing them as a carrier to synchronize to a master clock, using the irregularity of the anomaly to indicate the speed and pitch information to be corrected. A carrier frequency is determined and applied to a digitized form of the recording. This may be performed even in the absence of a prescribed reference code or tone, such as a pilot tone laid down purposefully at the moment of recording. In the case of signals presumed to have an error in the carrier, a corresponding signal is buffered, and in the case of a presumed error, a last known signal is used for the duration of the error.

    摘要翻译： 信号重建技术用于校正模拟音频录音中的哇音和颤音。 记录元件用于产生用于校正输出的信号。 涉及将调制实体（例如频率调制，幅度调制或相位调制实体）定位在记录中，提取它们，并利用它们作为载波与主时钟同步，使用异常的不规则 以指示要校正的速度和音调信息。 确定载波频率并将其应用于记录的数字化形式。 即使在没有规定的参考码或音调的情况下，也可以进行这种处理，例如在记录时有目的地排列的导频音。 在假定在载波中有错误的信号的情况下，相应的信号被缓冲，并且在假定的错误的情况下，在误差的持续时间中使用最后一个已知的信号。