公开(公告)号：US20160336431A1

公开(公告)日：2016-11-17

申请号：US14811823

申请日：2015-07-28

申请人： Powerchip Technology Corporation

发明人： Wen-Chung Yang ,  Te-Yuan Yin ,  Ssu-Ting Wang

IPC分类号： H01L29/66 ,  H01L21/28 ,  H01L21/311 ,  H01L21/02 ,  H01L21/033

CPC分类号： H01L29/66825 ,  H01L21/0223 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/02318 ,  H01L21/0337 ,  H01L21/28273 ,  H01L21/31111 ,  H01L29/42324

摘要： A method of manufacturing a semiconductor device, which includes the steps of forming a gate stack structure made up of a floating gate, an inter-poly dielectric, a control gate and a metal layer on a substrate, forming a conformal liner on the gate stack structure, covering a mask layer on the liner, where the mask layer is lower than the metal layer so that a portion of the liner is exposed, and performing a nitridation treatment to transform the exposed liner into a nitrided liner, so that at least the portion of the metal layer in the gate stack structure is covered by the nitrided liner.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：在衬底上形成由浮置栅极，多晶硅电介质，控制栅极和金属层构成的栅极堆叠结构，在栅极堆叠上形成共形衬垫 结构，覆盖衬垫上的掩模层，其中掩模层低于金属层，使得衬里的一部分暴露，并且进行氮化处理以将暴露的衬垫转变成氮化衬里，使得至少 栅堆叠结构中的金属层的一部分被氮化衬里覆盖。

公开(公告)号：US09490349B1

公开(公告)日：2016-11-08

申请号：US14811823

申请日：2015-07-28

申请人： Powerchip Technology Corporation

发明人： Wen-Chung Yang ,  Te-Yuan Yin ,  Ssu-Ting Wang

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L21/033 ,  H01L21/311 ,  H01L21/28

CPC分类号： H01L29/66825 ,  H01L21/0223 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/02318 ,  H01L21/0337 ,  H01L21/28273 ,  H01L21/31111 ,  H01L29/42324

摘要： A method of manufacturing a semiconductor device, which includes the steps of forming a gate stack structure made up of a floating gate, an inter-poly dielectric, a control gate and a metal layer on a substrate, forming a conformal liner on the gate stack structure, covering a mask layer on the liner, where the mask layer is lower than the metal layer so that a portion of the liner is exposed, and performing a nitridation treatment to transform the exposed liner into a nitrided liner, so that at least the portion of the metal layer in the gate stack structure is covered by the nitrided liner.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：在衬底上形成由浮置栅极，多晶硅电介质，控制栅极和金属层构成的栅极堆叠结构，在栅极堆叠上形成共形衬垫 结构，覆盖衬垫上的掩模层，其中掩模层低于金属层，使得衬里的一部分暴露，并且进行氮化处理以将暴露的衬垫转变成氮化衬里，使得至少 栅堆叠结构中的金属层的一部分被氮化衬里覆盖。