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公开(公告)号：US20070002987A1
公开(公告)日：2007-01-04
申请号：US11170391
申请日：2005-06-29
申请人： Pranesh Sinha , Sharon Akler , Yair Bourlas , Timothy Gallagher , Sheldon Gilbert , Stephen Pollmann , Frederick Price , Blaine Readler , John Wiss , Eli Arviv
发明人： Pranesh Sinha , Sharon Akler , Yair Bourlas , Timothy Gallagher , Sheldon Gilbert , Stephen Pollmann , Frederick Price , Blaine Readler , John Wiss , Eli Arviv
IPC分类号： H04L7/00
摘要： Apparatus, system and method for synchronizing one or more clocks across a communication link. A slave clock may be synchronized to a master clock by means of a synchronization signal sent from the master to the slave clock side of the link. The synchronization signal may be an expected signal pattern sent at intervals expected by the slave side. The slave clock may correlate received signals with a representation of the expected synchronization signal to produce a correlation sample sequence at a first sample rate which is related as n times the slave clock rate. The synchronization signal receipt time indicated by the correlation sample sequence may be refined by interpolating the correlation sample sequence around a best correlation sample to locate a best interpolation at an interpolation resolution smaller than the sample resolution. The best interpolation may in turn be further refined by estimating between interpolator outputs adjacent to the best interpolation output. The synchronization signal receipt time thus determined is compared to the expected time based upon the slave clock, which is adjusted until the times match. After initialization, all slave clock errors are preferably accumulated to prevent long-term slip between the slave and master clocks. Formerly independent master and slave clocks synchronized across the communication link constitute a noncommon clock which may be compared on each side of the link to secondary independent clocks, and the secondary independent clocks may then be separately synchronized by adjusting one to have the same difference from its local noncommon clock as the secondary clock on the other side of the link has from its local noncommon clock.
摘要翻译： 用于在通信链路上同步一个或多个时钟的装置，系统和方法。 从时钟可以通过从主机发送到链路的从时钟侧的同步信号与主时钟同步。 同步信号可以是以从机侧预期的间隔发送的预期信号模式。 从时钟可以将接收的信号与预期同步信号的表示相关，以产生与从时钟速率的n倍相关的第一采样率的相关采样序列。 通过相关采样序列指示的同步信号接收时间可以通过围绕最佳相关样本内插相关采样序列来精细化，以便以小于样本分辨率的插值分辨率定位最佳内插。 可以通过在与最佳内插输出相邻的内插器输出之间进行估计来进一步改进最佳内插。 将这样确定的同步信号接收时间与基于从时钟的预期时间进行比较，该从时钟被调整直到时间匹配。 在初始化之后，优选地累积所有从时钟错误以防止从机和主时钟之间的长期滑动。 通过通信链路同步的以前独立的主，从时钟构成了一个非常见的时钟，可以在链路的每一侧与次级独立时钟进行比较，然后可以通过调整二次独立时钟来与其独立时钟相同的差异 本地非通用时钟作为链路另一侧的辅助时钟源自其本地非通用时钟。
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公开(公告)号：US08199779B2
公开(公告)日：2012-06-12
申请号：US13021627
申请日：2011-02-04
申请人： Pranesh Sinha , Sharon Akler , Yair Bourlas , Timothy Leo Gallagher , Sheldon L. Gilbert , Stephen C. Pollmann , Frederick W. Price , Blaine C. Readler , John Wiss , Eli Arviv
发明人： Pranesh Sinha , Sharon Akler , Yair Bourlas , Timothy Leo Gallagher , Sheldon L. Gilbert , Stephen C. Pollmann , Frederick W. Price , Blaine C. Readler , John Wiss , Eli Arviv
摘要： Apparatus, system and method for synchronizing one or more clocks across a communication link. A slave clock may be synchronized to a master clock by means of a synchronization signal sent from the master to the slave clock side of the link. The synchronization signal may be an expected signal pattern sent at intervals expected by the slave side. The slave clock may correlate received signals with a representation of the expected synchronization signal to produce a correlation sample sequence at a first sample rate which is related as n times the slave clock rate. The synchronization signal receipt time indicated by the correlation sample sequence may be refined by interpolating the correlation sample sequence around a best correlation sample to locate a best interpolation at an interpolation resolution smaller than the sample resolution. The best interpolation may in turn be further refined by estimating between interpolator outputs adjacent to the best interpolation output. The synchronization signal receipt time thus determined is compared to the expected time based upon the slave clock, which is adjusted until the times match. After initialization, all slave clock errors are preferably accumulated to prevent long-term slip between the slave and master clocks. Formerly independent master and slave clocks synchronized across the communication link constitute a noncommon clock which may be compared on each side of the link to secondary independent clocks, and the secondary independent clocks may then be separately synchronized by adjusting one to have the same difference from its local noncommon clock as the secondary clock on the other side of the link has from its local noncommon clock.
摘要翻译： 用于在通信链路上同步一个或多个时钟的装置，系统和方法。 从时钟可以通过从主机发送到链路的从时钟侧的同步信号与主时钟同步。 同步信号可以是以从机侧预期的间隔发送的预期信号模式。 从时钟可以将接收的信号与预期同步信号的表示相关，以产生与从时钟速率的n倍相关的第一采样率的相关采样序列。 通过相关采样序列指示的同步信号接收时间可以通过围绕最佳相关样本内插相关采样序列来精细化，以便以小于样本分辨率的插值分辨率定位最佳内插。 可以通过在与最佳内插输出相邻的内插器输出之间进行估计来进一步改进最佳内插。 将这样确定的同步信号接收时间与基于从时钟的预期时间进行比较，该从时钟被调整直到时间匹配。 在初始化之后，优选地累积所有从时钟错误以防止从机和主时钟之间的长期滑动。 通过通信链路同步的以前独立的主，从时钟构成了一个非常见的时钟，可以在链路的每一侧与次级独立时钟进行比较，然后可以通过调整二次独立时钟来与其独立时钟相同的差异 本地非通用时钟作为链路另一侧的辅助时钟源自其本地非通用时钟。
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公开(公告)号：US07583705B2
公开(公告)日：2009-09-01
申请号：US11170391
申请日：2005-06-29
申请人： Pranesh Sinha , Sharon Akler , Yair Bourlas , Timothy Leo Gallagher , Sheldon L. Gilbert , Stephen C. Pollmann , Frederick W. Price , Blaine C. Readler , John Wiss , Eli Arviv
发明人： Pranesh Sinha , Sharon Akler , Yair Bourlas , Timothy Leo Gallagher , Sheldon L. Gilbert , Stephen C. Pollmann , Frederick W. Price , Blaine C. Readler , John Wiss , Eli Arviv
摘要： One or more clocks are synchronized across a communication link using a synchronization signal sent from a master to a slave clock. The synchronization signal may be an expected signal pattern sent at intervals expected by the slave. The slave clock may correlate received signals with a representation of the expected synchronization signal to produce a correlation sample sequence at a first sample rate. The synchronization signal receipt time is compared to the expected time and the slave clock is adjusted until the times match. Master and slave clocks synchronized across the communication link constitute a noncommon clock which may be compared on each side of the link to secondary independent clocks. The secondary independent clocks may be separately synchronized by adjusting one to have the same difference from its local noncommon clock as the secondary clock on the other side of the link has from its local noncommon clock.
摘要翻译： 使用从主机发送到从时钟的同步信号，通过通信链路同步一个或多个时钟。 同步信号可以是以从站所预期的间隔发送的预期信号模式。 从时钟可以将接收的信号与预期同步信号的表示相关，以产生第一采样率的相关采样序列。 将同步信号接收时间与预期时间进行比较，并调整从时钟直到时间匹配。 通过通信链路同步的主和从时钟构成了一个非常见的时钟，可以在链路的每一侧与次级独立时钟进行比较。 辅助独立时钟可以通过调整一个来独立同步，以使其与本地非常见时钟具有相同的差异，因为链路另一侧的辅助时钟与其本地非常见时钟相同。
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公开(公告)号：US20110122981A1
公开(公告)日：2011-05-26
申请号：US13021627
申请日：2011-02-04
申请人： Pranesh Sinha , Sharon Akler , Yair Bourlas , Timothy Leo Gallagher , Sheldon L. Gilbert , Stephen C. Pollmann , Frederick W. Price , Blaine C. Readler , John Wiss , Eli Arviv
发明人： Pranesh Sinha , Sharon Akler , Yair Bourlas , Timothy Leo Gallagher , Sheldon L. Gilbert , Stephen C. Pollmann , Frederick W. Price , Blaine C. Readler , John Wiss , Eli Arviv
IPC分类号： H04L7/00
摘要： Apparatus, system and method for synchronizing one or more clocks across a communication link. A slave clock may be synchronized to a master clock by means of a synchronization signal sent from the master to the slave clock side of the link. The synchronization signal may be an expected signal pattern sent at intervals expected by the slave side. The slave clock may correlate received signals with a representation of the expected synchronization signal to produce a correlation sample sequence at a first sample rate which is related as n times the slave clock rate. The synchronization signal receipt time indicated by the correlation sample sequence may be refined by interpolating the correlation sample sequence around a best correlation sample to locate a best interpolation at an interpolation resolution smaller than the sample resolution. The best interpolation may in turn be further refined by estimating between interpolator outputs adjacent to the best interpolation output. The synchronization signal receipt time thus determined is compared to the expected time based upon the slave clock, which is adjusted until the times match. After initialization, all slave clock errors are preferably accumulated to prevent long-term slip between the slave and master clocks. Formerly independent master and slave clocks synchronized across the communication link constitute a noncommon clock which may be compared on each side of the link to secondary independent clocks, and the secondary independent clocks may then be separately synchronized by adjusting one to have the same difference from its local noncommon clock as the secondary clock on the other side of the link has from its local noncommon clock.
摘要翻译： 用于在通信链路上同步一个或多个时钟的装置，系统和方法。 从时钟可以通过从主机发送到链路的从时钟侧的同步信号与主时钟同步。 同步信号可以是以从机侧预期的间隔发送的预期信号模式。 从时钟可以将接收的信号与预期同步信号的表示相关，以产生与从时钟速率的n倍相关的第一采样率的相关采样序列。 通过相关采样序列指示的同步信号接收时间可以通过围绕最佳相关样本内插相关采样序列来精细化，以便以小于样本分辨率的插值分辨率定位最佳内插。 可以通过在与最佳内插输出相邻的内插器输出之间进行估计来进一步改进最佳内插。 将这样确定的同步信号接收时间与基于从时钟的预期时间进行比较，该从时钟被调整直到时间匹配。 在初始化之后，优选地累积所有从时钟错误以防止从机和主时钟之间的长期滑动。 通过通信链路同步的以前独立的主，从时钟构成了一个非常见的时钟，可以在链路的每一侧与次级独立时钟进行比较，然后可以通过调整二次独立时钟来与其独立时钟相同的差异 本地非通用时钟作为链路另一侧的辅助时钟源自其本地非通用时钟。
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公开(公告)号：US07907640B2
公开(公告)日：2011-03-15
申请号：US12508431
申请日：2009-07-23
申请人： Pranesh Sinha , Sharon Akler , Yair Bourlas , Timothy Leo Gallagher , Sheldon L. Gilbert , Stephen C. Pollmann , Frederick W. Price , Blaine C. Readler , John Wiss , Eli Arviv
发明人： Pranesh Sinha , Sharon Akler , Yair Bourlas , Timothy Leo Gallagher , Sheldon L. Gilbert , Stephen C. Pollmann , Frederick W. Price , Blaine C. Readler , John Wiss , Eli Arviv
摘要： A slave clock may be synchronized to a master clock by means of a synchronization signal sent from the master to the slave clock side of the link. The synchronization signal may be an expected signal pattern sent at intervals expected by the slave side. The slave clock may correlate received signals with a representation of the expected synchronization signal to produce a correlation sample sequence at a first sample rate which is related as n times the slave clock rate. A best interpolation may in turn be further refined by estimating between interpolator outputs adjacent to the best interpolation output. The synchronization signal receipt time thus determined is compared to the expected time based upon the slave clock, which is adjusted until the times match. The best interpolation may in turn be further refined by estimating between interpolator outputs adjacent to the best interpolation output.
摘要翻译： 从时钟可以通过从主机发送到链路的从时钟侧的同步信号与主时钟同步。 同步信号可以是以从机侧预期的间隔发送的预期信号模式。 从时钟可以将接收的信号与预期同步信号的表示相关，以产生与从时钟速率的n倍相关的第一采样率的相关采样序列。 可以通过在与最佳内插输出相邻的内插器输出之间进行估计来进一步改进最佳内插。 将这样确定的同步信号接收时间与基于从时钟的预期时间进行比较，该从时钟被调整直到时间匹配。 可以通过在与最佳内插输出相邻的内插器输出之间进行估计来进一步改进最佳内插。
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公开(公告)号：US20090279652A1
公开(公告)日：2009-11-12
申请号：US12508431
申请日：2009-07-23
申请人： Pranesh Sinha , Sharon Akler , Yair Bourlas , Timothy Leo Gallagher , Sheldon L. Gilbert , Stephen C. Pollmann , Frederick W. Price , Blaine C. Readler , John Wiss , Eli Arviv
发明人： Pranesh Sinha , Sharon Akler , Yair Bourlas , Timothy Leo Gallagher , Sheldon L. Gilbert , Stephen C. Pollmann , Frederick W. Price , Blaine C. Readler , John Wiss , Eli Arviv
IPC分类号： H04L7/00
摘要： Apparatus, system and method for synchronizing one or more clocks across a communication link. A slave clock may be synchronized to a master clock by means of a synchronization signal sent from the master to the slave clock side of the link. The synchronization signal may be an expected signal pattern sent at intervals expected by the slave side. The slave clock may correlate received signals with a representation of the expected synchronization signal to produce a correlation sample sequence at a first sample rate which is related as n times the slave clock rate. The synchronization signal receipt time indicated by the correlation sample sequence may be refined by interpolating the correlation sample sequence around a best correlation sample to locate a best interpolation at an interpolation resolution smaller than the sample resolution. The best interpolation may in turn be further refined by estimating between interpolator outputs adjacent to the best interpolation output. The synchronization signal receipt time thus determined is compared to the expected time based upon the slave clock, which is adjusted until the times match. After initialization, all slave clock errors are preferably accumulated to prevent long-term slip between the slave and master clocks. Formerly independent master and slave clocks synchronized across the communication link constitute a noncommon clock which may be compared on each side of the link to secondary independent clocks, and the secondary independent clocks may then be separately synchronized by adjusting one to have the same difference from its local noncommon clock as the secondary clock on the other side of the link has from its local noncommon clock.
摘要翻译： 用于在通信链路上同步一个或多个时钟的装置，系统和方法。 从时钟可以通过从主机发送到链路的从时钟侧的同步信号与主时钟同步。 同步信号可以是以从机侧预期的间隔发送的预期信号模式。 从时钟可以将接收的信号与预期同步信号的表示相关，以产生与从时钟速率的n倍相关的第一采样率的相关采样序列。 通过相关采样序列指示的同步信号接收时间可以通过围绕最佳相关样本内插相关采样序列来精细化，以便以小于样本分辨率的插值分辨率定位最佳内插。 可以通过在与最佳内插输出相邻的内插器输出之间进行估计来进一步改进最佳内插。 将这样确定的同步信号接收时间与基于从时钟的预期时间进行比较，该从时钟被调整直到时间匹配。 在初始化之后，优选地累积所有从时钟错误以防止从机和主时钟之间的长期滑动。 通过通信链路同步的以前独立的主，从时钟构成了一个非常见的时钟，可以在链路的每一侧与次级独立时钟进行比较，然后可以通过调整二次独立时钟来与其独立时钟相同的差异 本地非通用时钟作为链路另一侧的辅助时钟源自其本地非通用时钟。
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公开(公告)号：US20050058098A1
公开(公告)日：2005-03-17
申请号：US10962957
申请日：2004-10-12
申请人： Israel Klein , Kenneth Stanwood , Steve Pollmann , Frederick Price , Rami Hadar , Eli Arviv , David Gazelle , Sheldon Gilbert
发明人： Israel Klein , Kenneth Stanwood , Steve Pollmann , Frederick Price , Rami Hadar , Eli Arviv , David Gazelle , Sheldon Gilbert
CPC分类号： H04B7/2656 , H04L1/0003 , H04L1/0004 , H04L1/0057 , H04L1/0059 , H04L1/0065 , H04L1/0083 , H04L25/03038 , H04L27/0008 , H04L2025/0342 , H04L2025/03477 , H04W72/0446 , H04W88/02 , H04W88/08 , Y02D50/10
摘要： A method of assigning downlink time slots to receive units where the units may generate data using different modulation schemes. The method preferably assigns the downlink time slots as a function of the complexity of modulation schemes employed by the units. Further, the method preferably assigns the time slots from the least complex modulation scheme to the most complex scheme. The method may further assign uplink time slots to transmit units where the transmit units may generate data using different modulation schemes. The method preferably assigns the uplink time slots as a function of the complexity of modulation schemes employed by the uplink units. Further, the method preferably assigns the uplink time slots from the least complex modulation scheme to the most complex scheme. In other embodiments, the downlink time slots are assigned as a function of the bit per symbol rate employed by the receive units, preferably from the lowest bit per symbol rate to the highest bit per symbol rate. Further, the uplink time slots are assigned as a function of the bit per symbol rate employed by the transmit units, preferably from the lowest bit per symbol rate to the highest bit per symbol rate. The present invention is also a method of simplifying the encoding of a predetermined number of bits of data into frames. The method adds error coding bits so that a ratio of the frame length times the baud rate of the frame times the bit packing ratio of the data divided the total bits of data is always an integer. The method may also convolutionally encode the bits of data so that the same equation is also always an integer. The present invention is also a method of updating the weights of a FIR filter where the filter processes symbols having variable modulation rates. When the modulation rate of the incoming symbols changes, the weights corresponding to the first symbol having the new modulation rate are changed based as the symbol propagates through the filter.
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公开(公告)号：US08537757B2
公开(公告)日：2013-09-17
申请号：US13487013
申请日：2012-06-01
申请人： Eli Arviv , Brian Spinar , Kenneth L. Stanwood , David Gazelle , Ofer Zimmerman , Penny Efraim , Yair Bourlas , Sheldon L. Gilbert
发明人： Eli Arviv , Brian Spinar , Kenneth L. Stanwood , David Gazelle , Ofer Zimmerman , Penny Efraim , Yair Bourlas , Sheldon L. Gilbert
IPC分类号： H04W4/00
CPC分类号： H04W72/1252 , H04W28/22 , H04W72/1257 , H04W76/10 , H04W76/30
摘要： The invention relates to communication systems and to systems and methods for implementing adaptive call admission control (CAC) in such systems. Adaptive call admission control can determine what CPE to base station calls (connections) are allowed at any given time. CAC, coupled with precedence, can further determine what connections are suspended if less bandwidth is available than is currently committed. Multiple techniques are disclosed to select connections for suspension. These techniques include suspending enough connections through the affected CPE until there is enough bandwidth to meet the remaining commitment, randomly (or in a round robin fashion) choosing connection to suspend from the entire set of connection, and using precedence priority levels.
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公开(公告)号：US09007897B2
公开(公告)日：2015-04-14
申请号：US12870620
申请日：2010-08-27
申请人： Israel Jay Klein , Kenneth L. Stanwood , Steve Pollmann , Frederick W. Price , Rami Hadar , Eli Arviv , David Gazelle , Sheldon Gilbert
发明人： Israel Jay Klein , Kenneth L. Stanwood , Steve Pollmann , Frederick W. Price , Rami Hadar , Eli Arviv , David Gazelle , Sheldon Gilbert
CPC分类号： H04B7/2656 , H04L1/0003 , H04L1/0004 , H04L1/0057 , H04L1/0059 , H04L1/0065 , H04L1/0083 , H04L25/03038 , H04L27/0008 , H04L2025/0342 , H04L2025/03477 , H04W72/0446 , H04W88/02 , H04W88/08 , Y02D50/10
摘要： A method of simplifying the encoding of a predetermined number of bits of data into frames including adding error coding bits so that a ratio of the frame length times the baud rate of the frame times the bit packing ratio of the data divided the total bits of data is always an integer. The method may also convolutionally encode the bits of data so that the same equation is also always an integer.
摘要翻译： 一种将预定数量的数据位的编码简化成包括相加错误编码位的帧的方法，使得帧长度乘以帧的波特率乘以数据的位打包率乘以数据的总比特数 总是一个整数。 该方法还可以对数据的比特进行卷积编码，使得相同的方程也总是为整数。
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10.发明申请公开(公告)号：US20100323733A1
公开(公告)日：2010-12-23
申请号：US12870620
申请日：2010-08-27
申请人： Israel Jay Klein , Kenneth L. Stanwood , Steve Pollmann , Frederick W. Price , Rami Hadar , Eli Arviv , David Gazelle , Sheldon Gilbert
发明人： Israel Jay Klein , Kenneth L. Stanwood , Steve Pollmann , Frederick W. Price , Rami Hadar , Eli Arviv , David Gazelle , Sheldon Gilbert
CPC分类号： H04B7/2656 , H04L1/0003 , H04L1/0004 , H04L1/0057 , H04L1/0059 , H04L1/0065 , H04L1/0083 , H04L25/03038 , H04L27/0008 , H04L2025/0342 , H04L2025/03477 , H04W72/0446 , H04W88/02 , H04W88/08 , Y02D50/10
摘要： A method of simplifying the encoding of a predetermined number of bits of data into frames including adding error coding bits so that a ratio of the frame length times the baud rate of the frame times the bit packing ratio of the data divided the total bits of data is always an integer. The method may also convolutionally encode the bits of data so that the same equation is also always an integer.
摘要翻译： 一种将预定数量的数据位的编码简化成包括相加错误编码位的帧的方法，使得帧长度乘以帧的波特率乘以数据的位打包率乘以数据的总比特数 总是一个整数。 该方法还可以对数据的比特进行卷积编码，使得相同的方程也总是为整数。
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