公开(公告)号：US12176672B2

公开(公告)日：2024-12-24

申请号：US17239085

申请日：2021-04-23

Applicant: Psiquantum, Corp.

Inventor： Eric Dudley ,  Yong Liang ,  Faraz Najafi ,  Vimal Kamineni ,  Ann Melnichuk

IPC: H01S3/067 ,  G02B6/122 ,  G02B6/12

Abstract: An optical device includes a substrate, a dielectric layer on the substrate, a waveguide within the dielectric layer, a light sensitive component (e.g., a photodetector) in the dielectric layer and coupled to the waveguide, and a plurality of light isolation structures in at least one of the substrate or the dielectric layer and configured to prevent stray light from reaching the light sensitive component. In some embodiments, a light isolation structure in the plurality of light isolation structures includes two opposing sidewalls and a filling material between the two opposing sidewalls. The two opposing sidewalls include an optical isolation layer. The filling material is characterized by a coefficient of thermal expansion (CTE) matching a CTE of at least one of the substrate or the dielectric layer.

公开(公告)号：US11817400B2

公开(公告)日：2023-11-14

申请号：US17377131

申请日：2021-07-15

Applicant: Psiquantum, Corp.

Inventor： Yong Liang ,  Vimal Kumar Kamineni ,  Chia-Ming Chang ,  James McMahon

IPC: H01L23/00 ,  H01L21/02 ,  H01L27/12

CPC classification number: H01L23/562 ,  H01L21/02186 ,  H01L27/1203

Abstract: In some embodiments method comprises depositing a ferroelectric layer on a top surface of a semiconductor wafer and forming one or more gaps in the ferroelectric layer. The one or more gaps can be formed on a repetitive spacing to relieve stresses between the ferroelectric layer and the semiconductor wafer. A first dielectric layer is deposited over the ferroelectric layer and the first dielectric layer is planarized to fill in the gaps. A second dielectric layer is formed between the ferroelectric layer and the semiconductor wafer. The second dielectric layer can be formed by annealing the wafer in an oxidizing atmosphere such that an upper portion of the semiconductor substrate forms an oxide layer between the semiconductor substrate and the ferroelectric layer.

公开(公告)号：US20250166988A1

公开(公告)日：2025-05-22

申请号：US18954217

申请日：2024-11-20

Applicant: Psiquantum, Corp.

Inventor： Yong Liang ,  Ann Melnichuk

IPC: H01L21/02 ,  H01L21/683

Abstract: A wafer comprises: a silicon layer; a silicon nitride layer on the silicon layer wherein the silicon nitride layer defines one or more gaps between regions of the silicon nitride layer; and silicon dioxide disposed within the one or more gaps and having a top surface coplanar with a top surface of the silicon nitride layer.

公开(公告)号：US12198926B2

公开(公告)日：2025-01-14

申请号：US17377135

申请日：2021-07-15

Applicant: Psiquantum, Corp.

Inventor： Yong Liang ,  Ann Melnichuk

IPC: H01L21/02 ,  H01L21/683

Abstract: In some embodiments a method comprises depositing a first silicon nitride layer on a top surface of a semiconductor wafer and forming one or more first gaps in the first silicon nitride layer. The one or more first gaps can relieve stress formed in the first silicon nitride layer. A first fill material is deposited on the first silicon nitride layer and the first silicon nitride layer is planarized. A second silicon nitride layer is deposited across the first silicon nitride layer and one or more second gaps are formed in the second silicon nitride layer. The one or more second gaps can relieve stress formed in the second silicon nitride layer. A second fill material is deposited across the second silicon nitride layer and the second silicon nitride layer is planarized.

公开(公告)号：US20240201525A1

公开(公告)日：2024-06-20

申请号：US18544220

申请日：2023-12-18

Applicant: Psiquantum, Corp.

Inventor： Yong Liang ,  Mark G. Thompson ,  Chia-Ming Chang ,  Vimal Kumar Kamineni

IPC: G02F1/035 ,  G02B6/12 ,  G02F1/225

CPC classification number: G02F1/035 ,  G02F1/225 ,  G02B2006/12142

Abstract: A system includes a classical computing system and one or more quantum computing chips coupled to the classical computing system. The one or more quantum computing chips includes one or more electro-optic devices. Each electro-optic device includes a substrate, a waveguide disposed on top of the substrate, and a layer stack disposed on top of the waveguide and including a plurality of electro-optic material layers interleaved with a plurality of interlayers. Each electro-optic device further comprising a waveguide core disposed on top of a portion of the layer stack. The plurality of interlayers are characterized by a first lattice structure and the plurality of electro-optic material layers are under tensile stress and are characterized by a second lattice structure and crystallographic phase.

公开(公告)号：US11226507B2

公开(公告)日：2022-01-18

申请号：US17083141

申请日：2020-10-28

Applicant: PSIQUANTUM, CORP.

Inventor： Yong Liang ,  Mark G. Thompson ,  Chia-Ming Chang ,  Vimal Kumar Kamineni

IPC: G02F1/035 ,  G02F1/225 ,  G02F1/21 ,  G02B6/12

Abstract: An electro-optic device includes a substrate and a waveguide on the substrate. The waveguide includes a layer stack including a plurality of electro-optic material layers interleaved with a plurality of interlayers, a waveguide core adjacent to the layer stack, a waveguide cladding layer, and a pair of electrodes in electrical contact with the plurality of electro-optic material layers. The plurality of interlayers maintains a first lattice structure at room temperature and a cryogenic temperature. The plurality of electro-optic material layers maintains a second lattice structure and crystallographic phase at the room temperature and the cryogenic temperature.

公开(公告)号：US20210028009A1

公开(公告)日：2021-01-28

申请号：US16791914

申请日：2020-02-14

Applicant: PsiQuantum Corp.

Inventor： Yong Liang

IPC: H01L21/02 ,  H01L21/28

Abstract: A method for processing a substrate includes positioning a silicon substrate in a deposition chamber. One or more intermediate layers are deposited on a surface of the silicon. The one or more intermediate layers can include strontium, which combines with the silicon to form strontium silicide. Alternatively, the one or more intermediate layers comprise germanium. A layer of amorphous strontium titanate is deposited on the one or more intermediate layers in a transient environment in which oxygen pressure is reduced while temperature is increased. The substrate is then exposed to an oxidizing and annealing atmosphere that oxidizes the one or more intermediate layers and converts the layer of amorphous strontium titanate to crystalline strontium titanate.

公开(公告)号：US20250087959A1

公开(公告)日：2025-03-13

申请号：US18957743

申请日：2024-11-23

Applicant: Psiquantum, Corp.

Inventor： Eric Dudley ,  Yong Liang ,  Faraz Najafi ,  Vimal Kamineni ,  Ann Melnichuk

IPC: H01S3/067 ,  G02B6/12 ,  G02B6/122

Abstract: A device includes a substrate and a dielectric layer on the substrate. The device also includes a light sensitive component in the dielectric layer and a trench having a first portion disposed in the substrate and a second portion disposed in the dielectric layer. The trench is adjacent the light sensitive component and includes an adhesion layer in the first portion and the second portion, an optical isolation layer on the adhesion layer, and a first fill material in the first portion and a second fill material in the second portion. The first fill material is characterized by a first coefficient of thermal expansion (CTE) that matches a CTE of the substrate and the second fill material is characterized by a second CTE that matches a CTE of the dielectric layer.

公开(公告)号：US12164184B2

公开(公告)日：2024-12-10

申请号：US17723295

申请日：2022-04-18

Applicant: PSIQUANTUM CORP.

Inventor： Yong Liang ,  Nikhil Kumar

IPC: G02B6/122 ,  G02B6/13 ,  G02F1/00 ,  G02F1/035 ,  G02F1/05

Abstract: An electro-optical device is fabricated on a semiconductor-on-insulator (SOI) substrate. The electro-optical device comprises a silicon dioxide layer, and an active layer having ferroelectric properties on the silicon dioxide layer. The silicon dioxide layer includes a first silicon dioxide layer of the SOI substrate and a second silicon dioxide layer converted from a silicon layer of the SOI substrate. The active layer includes a buffer layer epitaxially grown on the silicon layer of the SOI substrate and a ferroelectric layer epitaxially grown on the buffer layer. The electro-optical device further comprises one or more additional layers over the active layer, and first and second contacts to the active layer through at least one of the one or more additional layers. Methods of fabricating the electro-optical device are also described herein.

公开(公告)号：US20230197443A1

公开(公告)日：2023-06-22

申请号：US18112395

申请日：2023-02-21

Applicant: Psiquantum, Corp.

Inventor： Yong Liang

IPC: H01L21/02 ,  H01L21/28

CPC classification number: H01L21/02381 ,  H01L21/02236 ,  H01L21/28194 ,  H01L21/02161 ,  H01L21/0262

Abstract: A method for processing a substrate includes positioning a silicon substrate in a deposition chamber. One or more intermediate layers are deposited on a surface of the silicon. The one or more intermediate layers can include strontium, which combines with the silicon to form strontium silicide. Alternatively, the one or more intermediate layers comprise germanium. A layer of amorphous strontium titanate is deposited on the one or more intermediate layers in a transient environment in which oxygen pressure is reduced while temperature is increased. The substrate is then exposed to an oxidizing and annealing atmosphere that oxidizes the one or more intermediate layers and converts the layer of amorphous strontium titanate to crystalline strontium titanate.