公开(公告)号：US08988158B2

公开(公告)日：2015-03-24

申请号：US13836932

申请日：2013-03-15

Applicant: QUALCOMM Incorporated

Inventor： Sujiang Rong ,  Li Liu ,  Yiwu Tang

IPC: H03B5/12 ,  H03B5/02

CPC classification number: H03B5/1228 ,  H03B5/02 ,  H03B5/1215 ,  H03B5/1296 ,  H03B2200/0082 ,  H03B2200/009

Abstract: A method, an apparatus, and a computer program product are provided. The apparatus provides a VCO signal. The apparatus is a VCO. The apparatus includes a first transconductance circuit. The apparatus further includes a second transconductance circuit coupled with the first transconductance circuit. The second transconductance circuit has a first configuration/mode (e.g., CMOS configuration/mode) and a second configuration/mode (e.g., NMOS configuration/mode or PMOS configuration/mode). The second transconductance circuit is configured to couple an input of the second transconductance circuit to the first transconductance circuit in the first configuration/mode. The second transconductance circuit is configured to isolate the input of the second transconductance circuit from the first transconductance circuit in the second configuration/mode. The second transconductance circuit may include a first transistor and a second transistor, and the input may be a gate of each of the first transistor and the second transistor.

Abstract translation: 提供了一种方法，装置和计算机程序产品。 该装置提供VCO信号。 该装置是VCO。 该装置包括第一跨导电路。 该装置还包括与第一跨导电路耦合的第二跨导电路。 第二跨导电路具有第一配置/模式（例如，CMOS配置/模式）和第二配置/模式（例如，NMOS配置/模式或PMOS配置/模式）。 第二跨导电路被配置为在第一配置/模式中将第二跨导电路的输入耦合到第一跨导电路。 第二跨导电路被配置为在第二配置/模式中将第二跨导电路的输入与第一跨导电路隔离。 第二跨导电路可以包括第一晶体管和第二晶体管，并且输入可以是第一晶体管和第二晶体管中的每一个的栅极。

公开(公告)号：US20160373057A1

公开(公告)日：2016-12-22

申请号：US14745033

申请日：2015-06-19

Applicant: QUALCOMM Incorporated

Inventor： Mohammad Farazian ,  Masoud Moslehi Bajestan ,  Yiwu Tang ,  Jong Min Park ,  Sujiang Rong

IPC: H03B5/12

CPC classification number: H03B5/124 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1256 ,  H03B5/1296 ,  H03B2200/0072 ,  H03L7/099

Abstract: A dual-band voltage controlled oscillator (VCO) includes: a first oscillator circuit including a first inductor; a second oscillator circuit including a second inductor; a first mode switch configured to electrically connect or disconnect a first output terminal of the first oscillator circuit and a first output terminal of the second oscillator circuit; a second mode switch configured to electrically connect or disconnect a second output terminal of the first oscillator circuit and a second output terminal of the second oscillator circuit; a third mode switch configured to electrically connect or disconnect a first terminal of the first inductor and a first terminal of the second inductor; and a fourth mode switch configured to electrically connect or disconnect a second terminal of the first inductor and a second terminal of the second inductor.

Abstract translation: 双频带压控振荡器（VCO）包括：第一振荡器电路，包括第一电感器; 包括第二电感器的第二振荡器电路; 第一模式开关，被配置为电连接或断开第一振荡电路的第一输出端和第二振荡电路的第一输出端; 第二模式开关，被配置为电连接或断开第一振荡电路的第二输出端和第二振荡电路的第二输出端; 第三模式开关，被配置为电连接或断开第一电感器的第一端子和第二电感器的第一端子; 以及第四模式开关，被配置为电连接或断开第一电感器的第二端子和第二电感器的第二端子。

公开(公告)号：US08766674B1

公开(公告)日：2014-07-01

申请号：US13834861

申请日：2013-03-15

Applicant: QUALCOMM Incorporated

Inventor： Dongmin Park ,  Li Liu ,  Sujiang Rong

IPC: H03K3/00 ,  H03K7/02 ,  H03K5/02 ,  H03K17/16

CPC classification number: H03K5/08 ,  H03K6/02

Abstract: A high-speed current-mode clock driver includes feedback circuitry to maintain the voltage swing of a biasing node within a defined range. The current-mode clock driver includes a PMOS and an NMOS transistor receiving an oscillating signal at their gate terminals. The drain terminals of the PMOS and NMOS transistors are respectively coupled to input terminals of first and second variable conductivity circuits whose output terminals are coupled to a common node. A control circuit increases the conductivities of the first and second variable conductivity circuits in response to decreases in voltage swing of the common node, and decreases the conductivities of the first and second variable conductivity circuits in response to increases in voltage swing of the common node. The first and second variable conductivity circuits are optionally PMOS and NMOS transistors respectively.

Abstract translation: 高速电流模式时钟驱动器包括反馈电路，以将偏置节点的电压摆幅保持在限定的范围内。 电流模式时钟驱动器包括在其栅极端子处接收振荡信号的PMOS和NMOS晶体管。 PMOS和NMOS晶体管的漏极端子分别耦合到输出端耦合到公共节点的第一和第二可变电导率电路的输入端。 控制电路响应于公共节点的电压摆幅的减小而增加第一和第二可变电导率电路的电导率，并且响应于公共节点的电压摆幅的增加而降低第一和第二可变电导率电路的电导率。 第一和第二可变电导率电路分别是PMOS和NMOS晶体管。

公开(公告)号：US09819307B2

公开(公告)日：2017-11-14

申请号：US14745033

申请日：2015-06-19

Applicant: QUALCOMM Incorporated

Inventor： Mohammad Farazian ,  Masoud Moslehi Bajestan ,  Yiwu Tang ,  Jong Min Park ,  Sujiang Rong

IPC: H03B5/12 ,  H03L7/099

CPC classification number: H03B5/124 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1256 ,  H03B5/1296 ,  H03B2200/0072 ,  H03L7/099

Abstract: A dual-band voltage controlled oscillator (VCO) includes: a first oscillator circuit including a first inductor; a second oscillator circuit including a second inductor; a first mode switch configured to electrically connect or disconnect a first output terminal of the first oscillator circuit and a first output terminal of the second oscillator circuit; a second mode switch configured to electrically connect or disconnect a second output terminal of the first oscillator circuit and a second output terminal of the second oscillator circuit; a third mode switch configured to electrically connect or disconnect a first terminal of the first inductor and a first terminal of the second inductor; and a fourth mode switch configured to electrically connect or disconnect a second terminal of the first inductor and a second terminal of the second inductor.

公开(公告)号：US10903823B2

公开(公告)日：2021-01-26

申请号：US16147685

申请日：2018-09-29

Applicant: Qualcomm Incorporated

Inventor： Yiwu Tang ,  Sujiang Rong

IPC: H03K3/03 ,  H03B27/00 ,  H03B5/12 ,  H03K3/011

Abstract: An apparatus for radio-frequency (RF) oscillation signal production is disclosed. In example implementations, an apparatus includes an oscillator. The oscillator includes multiple oscillation stages that are coupled together in series into a ring. A respective oscillation stage of the multiple oscillation stages includes a transconductance amplifier and a core oscillator. The transconductance amplifier is coupled to a preceding oscillation stage. The core oscillator is coupled to the transconductance amplifier and to a succeeding oscillation stage, with the core oscillator including at least one output node configured to provide a respective output signal. In some implementations, at least one capacitor is coupled across at least the transconductance amplifier. In some aspects, at least one transistor of the transconductance amplifier is implemented with a silicon-on-insulator metal-oxide-semiconductor (SOI MOS) device that includes at least one back-gate terminal.

公开(公告)号：US09529380B1

公开(公告)日：2016-12-27

申请号：US14818191

申请日：2015-08-04

Applicant: QUALCOMM Incorporated

Inventor： Sujiang Rong ,  Rajagopalan Rangarajan

IPC: G06F1/04 ,  H03K21/02 ,  H03K5/01 ,  H03K5/00

CPC classification number: G06F1/04 ,  H03B19/14 ,  H03B27/00 ,  H03D7/14 ,  H03D7/165 ,  H03D7/18 ,  H03D2200/0088 ,  H03K5/01 ,  H03K21/026 ,  H03K2005/00013

Abstract: A circuit for generating a local oscillator signal includes: at least one divider module configured to receive an input signal and divide a frequency of the input signal by a division ratio; and a load circuit coupled to the at least one divider module, the load circuit configured to provide balanced current pulses that substantially reduce at least a portion of harmonic current ripples in the local oscillator signal.

Abstract translation: 一种用于产生本地振荡器信号的电路包括：至少一个分频器模块，被配置为接收输入信号并且将所述输入信号的频率除以分频比; 以及耦合到所述至少一个除法器模块的负载电路，所述负载电路被配置为提供平衡电流脉冲，其基本上减少所述本地振荡器信号中的谐波电流纹波的至少一部分。

公开(公告)号：US20140266479A1

公开(公告)日：2014-09-18

申请号：US13836932

申请日：2013-03-15

Applicant: QUALCOMM INCORPORATED

Inventor： Sujiang Rong ,  Li Liu ,  Yiwu Tang

IPC: H03B5/12 ,  H03B5/02

CPC classification number: H03B5/1228 ,  H03B5/02 ,  H03B5/1215 ,  H03B5/1296 ,  H03B2200/0082 ,  H03B2200/009

Abstract: A method, an apparatus, and a computer program product are provided. The apparatus provides a VCO signal. The apparatus is a VCO. The apparatus includes a first transconductance circuit. The apparatus further includes a second transconductance circuit coupled with the first transconductance circuit. The second transconductance circuit has a first configuration/mode (e.g., CMOS configuration/mode) and a second configuration/mode (e.g., NMOS configuration/mode or PMOS configuration/mode). The second transconductance circuit is configured to couple an input of the second transconductance circuit to the first transconductance circuit in the first configuration/mode. The second transconductance circuit is configured to isolate the input of the second transconductance circuit from the first transconductance circuit in the second configuration/mode. The second transconductance circuit may include a first transistor and a second transistor, and the input may be a gate of each of the first transistor and the second transistor.

Abstract translation: 提供了一种方法，装置和计算机程序产品。 该装置提供VCO信号。 该装置是VCO。 该装置包括第一跨导电路。 该装置还包括与第一跨导电路耦合的第二跨导电路。 第二跨导电路具有第一配置/模式（例如，CMOS配置/模式）和第二配置/模式（例如，NMOS配置/模式或PMOS配置/模式）。 第二跨导电路被配置为在第一配置/模式中将第二跨导电路的输入耦合到第一跨导电路。 第二跨导电路被配置为在第二配置/模式中将第二跨导电路的输入与第一跨导电路隔离。 第二跨导电路可以包括第一晶体管和第二晶体管，并且输入可以是第一晶体管和第二晶体管中的每一个的栅极。