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公开(公告)号：US20190305740A1
公开(公告)日：2019-10-03
申请号：US16446492
申请日：2019-06-19
Applicant: Qualcomm Incorporated
Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
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公开(公告)号：US20190158048A1
公开(公告)日：2019-05-23
申请号：US16200405
申请日：2018-11-26
Applicant: Qualcomm Incorporated
Inventor： Alaaeldien Mohamed Abdelrazek Medra , David Zixiang Yang , Kevin Hsi Huai Wang , Chen Zhai , Francesco Gatta
CPC classification number: H03F9/02 , H03F1/223 , H03F1/565 , H03F3/195 , H03F2200/294
Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
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公开(公告)号：US20190158040A1
公开(公告)日：2019-05-23
申请号：US16049473
申请日：2018-07-30
Applicant: Qualcomm Incorporated
Abstract: An apparatus is disclosed for enhanced reverse isolation and gain using feedback. The apparatus includes an input node, an amplification node, a feedback node, an output circuit, at least one amplifier circuit, and a feedback circuit. The output circuit is connected between the amplification node and the feedback node. The at least one amplifier circuit is connected between the input node and the amplification node. The at least one amplifier circuit includes an input transistor and a cascode stage. The input transistor has a gate node and a drain node, and the gate node is connected to the input node. The cascode stage is connected between the drain node and the amplification node. The feedback circuit includes at least one feedback capacitor that is connected between the feedback node and the input node.
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公开(公告)号：US09431963B2
公开(公告)日：2016-08-30
申请号：US14491833
申请日：2014-09-19
Applicant: QUALCOMM Incorporated
Inventor： Chuan Wang , Dongling Pan , Wing Fat Andy Lau , Jorge Andres Garcia , David Zixiang Yang
CPC classification number: H03F3/195 , H03F1/0205 , H03F1/26 , H03F1/56 , H03F3/19 , H03F3/211 , H03F2200/294 , H03F2200/451 , H03F2200/541 , H03F2203/21109 , H04B1/005
Abstract: A dual stage LNA for use in multiband receivers is disclosed. In an exemplary embodiment, an apparatus includes a plurality of first stage amplifiers having a plurality of first stage output ports, respectively, to output first stage amplified voltage mode signals. The apparatus also includes a plurality of second stage amplifiers having a plurality of second stage input ports, respectively, and second stage output ports to output amplified current mode signals. The apparatus also includes a switch apparatus having input terminals connected to the first stage output ports and output terminals connected to the second stage input ports, the switch apparatus to connect selected second stage input ports to selected first stage output ports.
Abstract translation: 公开了一种用于多频带接收机的双级LNA。 在示例性实施例中，装置包括分别具有多个第一级输出端口的多个第一级放大器，用于输出第一级放大的电压模式信号。 该装置还包括分别具有多个第二级输入端口的多个第二级放大器和用于输出放大的电流模式信号的第二级输出端口。 该装置还包括具有连接到第一级输出端口的输入端子和连接到第二级输入端口的输出端子的开关装置，该开关装置将所选择的第二级输入端口连接到所选择的第一级输出端口。
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公开(公告)号：US09407379B2
公开(公告)日：2016-08-02
申请号：US14516546
申请日：2014-10-16
Applicant: QUALCOMM Incorporated
CPC classification number: H04B15/06 , H03D7/1458 , H03D7/1483 , H03F2200/165 , H03F2200/222 , H03F2200/225 , H03F2200/451 , H03F2200/534 , H03F2200/541 , H04B2215/064
Abstract: An apparatus for reducing a harmonic response in an electronic circuit is provided. The apparatus includes an RF input configured to provide a first signal operating at a radio frequency. The apparatus includes a local oscillator configured to produce a second signal operating at a local oscillator (LO) frequency. The apparatus includes a switching mixer configured to mix the first and second signals. The apparatus includes a notch filter comprising an inductor and a capacitor connected in parallel. The notch filter is directly coupled to an input of the switching mixer in series. The notch filter is tuned such that its resonant frequency is a harmonic of the LO frequency signal. In an aspect, the apparatus also includes a transformer configured to provide the first signal. In an aspect the apparatus also includes a second notch filter comprising a second inductor and a second capacitor connected in parallel.
Abstract translation: 提供一种用于减少电子电路中的谐波响应的装置。 该装置包括被配置为提供以射频工作的第一信号的RF输入。 该装置包括配置成产生以本地振荡器（LO）频率工作的第二信号的本地振荡器。 该装置包括配置成混合第一和第二信号的切换混合器。 该装置包括陷波滤波器，该陷波滤波器包括并联连接的电感器和电容器。 陷波滤波器与串联的开关混频器的输入端直接耦合。 调谐陷波滤波器使其谐振频率为LO频率信号的谐波。 在一方面，该装置还包括被配置为提供第一信号的变压器。 在一方面，该装置还包括第二陷波滤波器，其包括并联连接的第二电感器和第二电容器。
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Patent Agency Ranking
公开(公告)号：US10530314B2
公开(公告)日：2020-01-07
申请号：US15940808
申请日：2018-03-29
Applicant: Qualcomm Incorporated
Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
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公开(公告)号：US09755591B2
公开(公告)日：2017-09-05
申请号：US15250642
申请日：2016-08-29
Applicant: QUALCOMM Incorporated
Inventor： Chuan Wang , Dongling Pan , Wing Fat Andy Lau , Jorge Andres Garcia , David Zixiang Yang
CPC classification number: H03F3/195 , H03F1/0205 , H03F1/26 , H03F1/56 , H03F3/19 , H03F3/211 , H03F2200/294 , H03F2200/451 , H03F2200/541 , H03F2203/21109 , H04B1/005
Abstract: An apparatus including: a plurality of amplifiers having a plurality of output ports, respectively, the plurality of amplifiers configured to amplify radio frequency (RF) signals received from at least one antenna; a plurality of demodulators configured to receive the amplified RF signals at a plurality of input ports, respectively, the plurality of demodulators configured to downconvert the received RF signals; and a plurality of switches configured to couple selected output ports of the plurality of amplifiers to selected input ports of the plurality of demodulators, wherein each switch of the plurality of switches is configured such that at least one of the plurality of output ports of the plurality of amplifiers is selectively coupled to any of multiple input ports of the plurality of input ports of the plurality of demodulators.
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公开(公告)号：US10700655B2
公开(公告)日：2020-06-30
申请号：US16200405
申请日：2018-11-26
Applicant: Qualcomm Incorporated
Inventor： Alaaeldien Mohamed Abdelrazek Medra , David Zixiang Yang , Kevin Hsi Huai Wang , Chen Zhai , Francesco Gatta
Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
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公开(公告)号：US10491173B2
公开(公告)日：2019-11-26
申请号：US15940808
申请日：2018-03-29
Applicant: Qualcomm Incorporated
Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
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公开(公告)号：US20190158042A1
公开(公告)日：2019-05-23
申请号：US15940808
申请日：2018-03-29
Applicant: Qualcomm Incorporated
IPC: H03F1/56 , H03H7/38 , H03F1/22 , H04B1/3827
Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
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