公开(公告)号：US20180234122A1

公开(公告)日：2018-08-16

申请号：US15950779

申请日：2018-04-11

Applicant: QUALCOMM Incorporated

Inventor： Shih-Wei Chou ,  Chulkyu Lee ,  Dhaval Sejpal

IPC: H04B1/04 ,  H04L25/493 ,  H04L25/02 ,  H04B3/52 ,  G06F13/40

CPC classification number: H04B1/04 ,  G06F13/4072 ,  H04L25/0272 ,  H04L25/028 ,  H04L25/493

Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. Transmission lines are selectively terminated in an N-phase polarity encoded transmitter when the transmission lines would otherwise be undriven. Data is mapped to a sequence of symbols to be transmitted on a plurality of wires. The sequence of symbols is encoded in three signals. A first terminal of a plurality of terminals may be driven such that transistors are activated to couple the first terminal to first and second voltage levels. The first terminal may further be driven such that a dedicated transistor is activated to couple the first terminal to an intermediate voltage level. The dedicated transistor is activated based on a voltage level for driving a second terminal of the three terminals and a voltage level for driving a third terminal of the three terminals.

公开(公告)号：US11108604B2

公开(公告)日：2021-08-31

申请号：US16984896

申请日：2020-08-04

Applicant: QUALCOMM Incorporated

Inventor： Chulkyu Lee ,  Dhaval Sejpal ,  George Alan Wiley

IPC: H04B1/00 ,  H04L27/20 ,  H04L27/233 ,  H04L27/227

Abstract: Certain disclosed methods, apparatus, and systems enable improved communication on a multiphase communication link through improved encoding techniques and protocol. A data communication apparatus has a plurality of line drivers configured to couple the apparatus to a 3-wire link, and a data encoder configured to encode at least 3 bits of binary data in each transition between two symbols that are consecutively transmitted by the plurality of line drivers over the 3-wire link such that each pair of consecutively-transmitted symbols comprises two different symbols. Each symbol defines signaling states of the 3-wire link during an associated symbol transmission interval such that each wire of the 3-wire link is in a different signaling state from the other wires of the 3-wire link during the associated symbol transmission interval. Data may be encoded using a combination of 3-phase and pulse amplitude modulation.

公开(公告)号：US10833899B2

公开(公告)日：2020-11-10

申请号：US16526332

申请日：2019-07-30

Applicant: QUALCOMM Incorporated

Inventor： Shih-Wei Chou ,  Chulkyu Lee ,  Dhaval Sejpal

IPC: H04L25/02 ,  H04L25/493 ,  G06F13/40 ,  H04B1/04 ,  H04B3/52

Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. Transmission lines are selectively terminated in an N-phase polarity encoded transmitter when the transmission lines would otherwise be undriven. Data is mapped to a sequence of symbols to be transmitted on a plurality of wires. The sequence of symbols is encoded in three signals. A first terminal of a plurality of terminals may be driven such that transistors are activated to couple the first terminal to first and second voltage levels. The first terminal may further be driven such that a dedicated transistor is activated to couple the first terminal to an intermediate voltage level.

公开(公告)号：US10289600B2

公开(公告)日：2019-05-14

申请号：US15332756

申请日：2016-10-24

Applicant: QUALCOMM Incorporated

Inventor： Dhaval Sejpal ,  Shih-Wei Chou ,  Chulkyu Lee ,  Ohjoon Kwon ,  George Alan Wiley

IPC: G06F13/20 ,  G06F13/42 ,  H04L25/49 ,  H04L7/00

Abstract: A method for error detection in transmissions on a multi-wire interface includes providing a plurality of launch clock signals, including launch clock signals having a different phase shifts, determining a type of transition in signaling state that will occur on each wire of the 3-wire interface at a boundary between two consecutively transmitted symbols, and selecting one of the plurality of launch clock signals to initiate the transition of signaling state on each wire of the 3-phase interface. Selecting one of the plurality of launch clock signals may include selecting a first launch clock signal when the transition in signaling state terminates at an undriven state, and selecting a second launch clock signal when the transition in signaling state begins at an undriven state. An edge in the first launch clock signal may occur before a corresponding edge in the second launch clock signal.

公开(公告)号：US09553635B1

公开(公告)日：2017-01-24

申请号：US14808272

申请日：2015-07-24

Applicant: QUALCOMM Incorporated

Inventor： Dhaval Sejpal ,  Chulkyu Lee ,  George Alan Wiley

IPC: H04L25/34 ,  H04B3/54 ,  H04B3/462

CPC classification number: H04B3/54 ,  H04B3/462 ,  H04L7/0087 ,  H04L7/033 ,  H04L25/0286 ,  H04L25/14 ,  H04L25/4917

Abstract: A method, an apparatus, and a computer program product for data communication over a multi-wire, multi-phase interface are provided. The method may include providing a sequence of symbols to be transmitted on a 3-wire interface, each symbol in the sequence of symbols defining one of three voltage states for each wire of the 3-wire interface, driving all wires of the 3-wire interface to a common voltage state during a transition from a first transmitted symbol to a second transmitted symbol, driving each wire of the 3-wire interface in accordance with the second transmitted symbol after a predetermined delay. Each wire may be in a different voltage state from the other wires of the 3-wire interface during transmission of the each symbol. The common voltage state may lie between two of the three voltage states.

Abstract translation: 提供了一种用于通过多线，多相接口进行数据通信的方法，装置和计算机程序产品。 该方法可以包括提供要在3线接口上发送的符号序列，符号序列中的每个符号定义3线接口的每根线的三种电压状态之一，驱动3线的所有线 在从第一传输符号到第二传输符号的转变期间接合到公共电压状态，在预定延迟之后根据第二传输符号驱动3线接口的每条线。 在每个符号的传输期间，每根导线可能处于与3线接口的其它线不同的电压状态。 公共电压状态可以位于三个电压状态中的两个之间。

公开(公告)号：US10419252B2

公开(公告)日：2019-09-17

申请号：US16050603

申请日：2018-07-31

Applicant: QUALCOMM Incorporated

Inventor： Shih-Wei Chou ,  Chulkyu Lee ,  Dhaval Sejpal

IPC: H04B1/04 ,  H04L25/493 ,  H04L25/02

Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. Transmission lines are selectively terminated in an N-phase polarity encoded transmitter when the transmission lines would otherwise be undriven. Data is mapped to a sequence of symbols to be transmitted on a plurality of wires. The sequence of symbols is encoded in three signals. A first terminal of a plurality of terminals may be driven such that transistors are activated to couple the first terminal to first and second voltage levels. The first terminal may further be driven such that a dedicated transistor is activated to couple the first terminal to an intermediate voltage level.

公开(公告)号：US09998154B2

公开(公告)日：2018-06-12

申请号：US15172913

申请日：2016-06-03

Applicant: QUALCOMM Incorporated

Inventor： Shih-Wei Chou ,  Chulkyu Lee ,  Dhaval Sejpal

IPC: H04B1/04 ,  H04B3/52 ,  G06F13/40 ,  H04L25/02 ,  H04L25/493

CPC classification number: H04B1/04 ,  G06F13/4072 ,  H04B3/52 ,  H04L25/0272 ,  H04L25/028 ,  H04L25/493

Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. Transmission lines are selectively terminated in an N-phase polarity encoded transmitter when the transmission lines would otherwise be undriven. Data is mapped to a sequence of symbols to be transmitted on a plurality of wires. The sequence of symbols is encoded in three signals. A first terminal of a plurality of terminals may be driven such that transistors are activated to couple the first terminal to first and second voltage levels. The first terminal may further be driven such that a dedicated transistor is activated to couple the first terminal to an intermediate voltage level. The dedicated transistor is activated based on a voltage level for driving a second terminal of the three terminals and a voltage level for driving a third terminal of the three terminals.

公开(公告)号：US20170026083A1

公开(公告)日：2017-01-26

申请号：US14808272

申请日：2015-07-24

Applicant: QUALCOMM Incorporated

Inventor： Dhaval Sejpal ,  Chulkyu Lee ,  George Alan Wiley

IPC: H04B3/54 ,  H04B3/462

CPC classification number: H04B3/54 ,  H04B3/462 ,  H04L7/0087 ,  H04L7/033 ,  H04L25/0286 ,  H04L25/14 ,  H04L25/4917

Abstract: A method, an apparatus, and a computer program product for data communication over a multi-wire, multi-phase interface are provided. The method may include providing a sequence of symbols to be transmitted on a 3-wire interface, each symbol in the sequence of symbols defining one of three voltage states for each wire of the 3-wire interface, driving all wires of the 3-wire interface to a common voltage state during a transition from a first transmitted symbol to a second transmitted symbol, driving each wire of the 3-wire interface in accordance with the second transmitted symbol after a predetermined delay. Each wire may be in a different voltage state from the other wires of the 3-wire interface during transmission of the each symbol. The common voltage state may lie between two of the three voltage states.

Abstract translation: 提供了一种用于通过多线，多相接口进行数据通信的方法，装置和计算机程序产品。 该方法可以包括提供要在3线接口上发送的符号序列，符号序列中的每个符号定义3线接口的每根线的三种电压状态之一，驱动3线的所有线 在从第一传输符号到第二传输符号的转变期间接合到公共电压状态，在预定延迟之后根据第二传输符号驱动3线接口的每条线。 在每个符号的传输期间，每根导线可能处于与3线接口的其它线不同的电压状态。 公共电压状态可以位于三个电压状态中的两个之间。

公开(公告)号：US11244895B2

公开(公告)日：2022-02-08

申请号：US16889645

申请日：2020-06-01

Applicant: QUALCOMM Incorporated

Inventor： Ramesh Manchana ,  Sudheer Chowdary Gali ,  Biswa Ranjan Panda ,  Dhaval Sejpal ,  Stanley Seungchul Song

IPC: H01L23/522 ,  H01L23/528 ,  H01L27/06 ,  H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L49/02

Abstract: A substrate tie cell on an IC is provided. The substrate tie cell includes a diffusion region. The diffusion region is a p-type diffusion region on or within a p-type substrate, an n-type diffusion region on or within an n-type well within a p-type substrate, an n-type diffusion region on or within an n-type substrate, or a p-type diffusion region on or within a p-type well within an n-type substrate. The substrate tie cell further includes a plurality of adjacent gate interconnects (n adjacent gate interconnects) extending over the diffusion region, where n≥4. The diffusion region is configured to be at one of a first voltage or a second voltage, and the gate interconnects are configured to be at an other of the first voltage or the second voltage. In one configuration, the first voltage is a power supply voltage and the second voltage is a ground voltage.

公开(公告)号：US20170039163A1

公开(公告)日：2017-02-09

申请号：US15332756

申请日：2016-10-24

Applicant: QUALCOMM Incorporated

Inventor： Dhaval Sejpal ,  Shih-Wei Chou ,  Chulkyu Lee ,  Ohjoon Kwon ,  George Alan Wiley

IPC: G06F13/42

CPC classification number: G06F13/4291 ,  G06F13/4278 ,  H04L25/4917

Abstract: Apparatus, systems and methods for error detection in transmissions on a multi-wire interface are disclosed. One method includes providing a plurality of launch clock signals, including launch clock signals having a different phase shifts, determining a type of transition in signaling state that will occur on each wire of the 3-wire interface at a boundary between two consecutively transmitted symbols, and selecting one of the plurality of launch clock signals to initiate the transition of signaling state on each wire of the 3-phase interface. Selecting one of the plurality of launch clock signals may include selecting a first launch clock signal when the transition in signaling state terminates at an undriven state, and selecting a second launch clock signal when the transition in signaling state begins at an undriven state. An edge in the first launch clock signal may occur before a corresponding edge in the second launch clock signal.

Abstract translation: 公开了用于在多线接口上的传输中的错误检测的装置，系统和方法。 一种方法包括提供多个发射时钟信号，包括具有不同相移的发射时钟信号，确定将在两条连续发射的符号之间的边界处在3线接口的每条线路上发生的信令状态的转换类型， 以及选择所述多个发射时钟信号之一以启动所述三相接口的每条线路上的信令状态的转换。 选择多个发射时钟信号中的一个可以包括当信令状态的转换在未驱动状态下终止时选择第一发射时钟信号，以及当信令状态的转变在未驱动状态开始时选择第二发射时钟信号。 第一个启动时钟信号中的边沿可能发生在第二个启动时钟信号的相应边沿之前。